Related papers: Self-consistent Capacitance-Voltage Characterizati…
We present a systematic study of various ways (top gates, local doping, substrate bias) to fabricate and tune multi-dot structures in silicon nanowire multigate MOSFETs (metal-oxide-semiconductor field-effect transistors). The carrier…
The current work explores a geometrically engineered dual gate GaAs nanowire FET with state of the art miniaturized dimensions for high performance charge qubit operation at room temperature. Relevant gate voltages in such device can create…
Quantum mechanical effects induced by the miniaturization of complementary metal-oxide-semiconductor (CMOS) technology hamper the performance and scalability prospects of field-effect transistors. However, those quantum effects, such as…
We report on microwave operation of top-gated single carbon nanotube transistors. From transmission measurements in the 0.1-1.6 GHz range, we deduce device transconductance gm and gate-nanotube capacitance Cg of micro- and nanometric…
It is expected that the introduction of a viscosity gradient across a nanofluidic system will drastically vary its current-voltage response, $i-V$. However, to date, there is no self-consistent theoretical model that can be used to fully…
Solution processed field-effect transistors based on single crystalline silicon nanowires (Si NWs) with metal Schottky contacts are demonstrated. The semiconducting layer was deposited from a nanowire ink formulation at room temperature.…
Bandstructure effects in PMOS transport of strongly quantized silicon nanowire field-effect-transistors (FET) in various transport orientations are examined. A 20-band sp3d5s* spin-orbit-coupled (SO) atomistic tight-binding model coupled to…
We present measurements of silicon (Si) metal-oxide-semiconductor (MOS) nanostructures that are fabricated using a process that facilitates essentially arbitrary gate geometries. Stable Coulomb blockade behavior free from the effects of…
We employ density functional theory to calculate the self consistent electronic structure, free energy and linear source-drain conductance of a lateral semiconductor quantum dot patterned via surface gates on the 2DEG formed at the…
A fitting model is developed for accounting the asymmetric ambipolarities in the I-V characteristics of graphene field-effect transistors (G-FETs) with doped channels, originating from the thermionic emission and interband tunneling at the…
We report on DC and microwave electrical transport measurements in silicon-on-insulator CMOS nano-transistors at low and room temperature. At low source-drain voltage, the DC current and RF response show signs of conductance quantization.…
We report the detection of a gate-tunable kinetic inductance in a hybrid InAs/Al nanowire. For this purpose, we have embedded the nanowire into a quarter-wave coplanar waveguide resonator and measured the resonance frequency of the circuit.…
Junctionless transistors made of silicon have previously been demonstrated experimentally and by simulations. Junctionless devices do not require fabricating an abrupt source-drain junction and thus can be easier to implement in aggressive…
A physics-based compact model for silicon gate-all-around (GAA) nanowire tunneling FETs (NW-tFETs) with good accuracy has been developed by considering Phonon-Assisted Tunneling (PAT) and transition from Quantum Capacitance Limit (QCL) to…
We presents a data-calibrated compact model of carbon nanotube (CNT) field-effect transistors (CNFETs) based on the virtual-source (VS) approach, describing the intrinsic current-voltage and charge-voltage characteristics. The features of…
We have investigated electrical transport in a diffusive multiwalled carbon nanotube contacted using superconducting leads made of Al/Ti sandwich structure. We find proximity-induced superconductivity with measured critical currents up to…
We introduce a fabrication method for gate-all-around nanowire field-effect transistors. Single nanowires were aligned perpendicular to underlying bottom gates using a resist-trench alignment technique. Top gates were then defined aligned…
A nanoscale device consisting of a metal nanowire, a dielectric, and a gate is proposed. A combination of quantum and thermal stochastic effects enable the device to have multiple functionalities, serving alternately as a transistor, a…
We analyze the distributions of electric potential and field, polarization and charge, and the differential capacitance of a silicon metal-oxide-ferroelectric field effect transistor (MOSFET), in which a gate insulator consists of thin…
In this work, we propose an explicit analytical equation to show the variation of top gate threshold voltage with respect to the JFET bottom gate voltage for a Flexible Threshold Voltage Field Effect Transistor (Flexible-FET) by solving 2-D…