Related papers: Variability Improvement by Interface Passivation a…

In this paper, 20nm - 80nm channel length (Lch) InGaAs gate- all-around (GAA) nanowire MOSFETs with record high on- state and off-state performance have been demonstrated by equivalent oxide thickness (EOT) and nanowire width (WNW) scaling…

The first inversion-mode gate-all-around (GAA) III-V MOSFETs are experimentally demonstrated with a high mobility In0.53Ga0.47As channel and atomic-layer-deposited (ALD) Al2O3/WN gate stacks by a top-down approach. A well-controlled InGaAs…

In this paper, we have experimentally demonstrated, for the first time, III-V 4D transistors with vertically stacked InGaAs nanowire (NW) channels and gate-all-around (GAA) architecture. Novel process technology enabling the transition from…

Gate-all-around (GAA) nanowire (NW) field-effect transistor (FET) is a promising device architecture due to its superior gate controllability than that of the conventional FinFET architecture. The significantly higher electron mobility of…

In this work, we demonstrate atomic-layer-deposited (ALD) single-channel indium oxide (In2O3) gate-all-around (GAA) nanoribbon FETs in a back-end-of-line (BEOL) compatible process. A maximum on-state current (ION) of 19.3 mA/{\mu}m (near 20…

Difficulties in obtaining high-performance p-type transistors and gate insulator charge-trapping effects present two major challenges for III-V complementary metal-oxide semiconductor (CMOS) electronics. We report a p-GaAs nanowire…

InGaAs gate-all-around nanowire MOSFETs with channel length down to 50nm have been experimentally demonstrated by top-down approach. The nanowire size-dependent transport properties have been systematically investigated. It is found that…

This letter reports high-performance $\mathrm{\beta} Ga2O3 thin channel MOSFETs with T-gate and degenerately doped source/drain contacts regrown by MOCVD. Gate length scaling (LG= 160-200 nm) leads to a peak drain current (ID,MAX) of 285…

Nano-membrane tri-gate beta-gallium oxide (\b{eta}-Ga2O3) field-effect transistors (FETs) on SiO2/Si substrate fabricated via exfoliation have been demonstrated for the first time. By employing electron beam lithography, the minimum-sized…

We develop a robust and versatile platform to define nanostructures at oxide interfaces via patterned top gates. Using LaAlO$_3$/SrTiO$_3$ as a model system, we demonstrate controllable electrostatic confinement of electrons to nanoscale…

We report Beta-AlGaO/Ga2O3 tri-gate heterostructure MOSHEMTs incorporating a thin 5 nm Al2O3 gate oxide layer for improved gate control and reduced leakage. The devices were fabricated on AlGaO/GaO heterostructures grown by ozone MBE on…

In this work, we demonstrate high performance indium-tin-oxide (ITO) transistors with the channel thickness down to 1 nm and ferroelectric Hf0.5Zr0.5O2 as gate dielectric. On-current of 0.243 A/mm is achieved on sub-micron gate-length ITO…

The atomic-level structural detail and the quantum effects are becoming crucial to device performance as the emerging advanced transistors, representatively GAAFETs, are scaling down towards sub-3nm nodes. However, a multiscale simulation…

Few-layer phosphorene MOSFETs with 0.3-um-long gate and 15-nm-thick Al2O3 gate insulator was found to exhibit a forward-current cutoff frequency of 2 GHz and a maximum oscillation frequency of 8 GHz after de-embedding for the parasitic…

A Low-Power Variable Gain (VG) mm-Wave Low Noise Amplifier (LNA) is designed and simulated in a 28-nm CMOS process. The LNA utilizes a simple, yet novel, technique presented in this paper to vary the small-signal output resistance to…

We report on the growth of axial InAs-on-GaAs nanowire heterostructures on silicon by molecular beam epitaxy using 20 nm diameter Au catalysts. First, the growth parameters of the GaAs nanowire segment were optimized to achieve a pure…

As silicon transistors scale toward future technology nodes, three-dimensional architectures -- including gate-all-around (GAA) nanoribbon and complementary field-effect transistors (CFETs) -- require channel widths in the tens of…

We present a systematic characterization of fluctuations in submicron Hall devices based on GaAs/AlGaAs two-dimensional electron gas heterostructures at temperatures between 1.5 K to 60 K. A large variety of noise spectra, from 1/f to…

GaAs was central to the development of quantum devices but is rarely used for nanowire-based quantum devices with InAs, InSb and SiGe instead taking the leading role. p-type GaAs nanowires offer a path to studying strongly-confined 0D and…

Nanoscale semiconductor materials have been extensively investigated as the channel materials of transistors for energy-efficient low-power logic switches to enable scaling to smaller dimensions. On the opposite end of transistor…