Related papers: Power aware physical model for 3d IC's
In a multiprocessor system on chip (MPSoC) IC the processor is one of the highest heat dissipating devices. The temperature generated in an IC may vary with floor plan of the chip. This paper proposes an integration and thermal analysis…
Besides the lot of advantages offered by the 3D stacking of devices in an integrated circuit there is a chance of device damage due to rise in peak temperature value. Hence, in order to make use of all the potential benefits of the vertical…
Modern multiprocessor system-on-chips (SoCs) integrate multiple heterogeneous cores to achieve high energy efficiency. The power consumption of each core contributes to an increase in the temperature across the chip floorplan. In turn,…
One of the crucial steps in the design of an integrated circuit is the minimization of heating and temperature non-uniformity. Current temperature calculation methods, such as finite element analysis and resistor networks have considerable…
The continuous increase in computational power of GPUs, essential for advancements in areas like artificial intelligence and data processing, is driving the adoption of liquid cooling in data centers. Skived copper cold plates featuring…
3D stacked technology has emerged as an effective mechanism to overcome physical limits and communication delays found in 2D integration. However, 3D technology also presents several drawbacks that prevent its smooth application. Two of the…
As technology scales down, the static power is expected to become a significant fraction of the total power. The exponential dependence of static power with the operating temperature makes the thermal profile estimation of high-performance…
The hot-spot phenomenon is a relatively frequent problem occurring in current photovoltaic generators. It entails both a risk for the photovoltaic module's lifetime and a decrease in its operational efficiency. Nevertheless, there is still…
Thermal management of integrated circuits (ICs) is important to prevent thermal hotspots which are the leading cause of IC failure. Thermal management is even more critical in 3D integrated circuits (3D ICs) as the prevalence of thermal…
Existing power modelling research focuses not on the method used for developing models but rather on the model itself. This paper aims to develop a method for deploying power models on emerging processors that will be used, for example, in…
Fine-grained power estimation in multicore Systems on Chips (SoCs) is crucial for efficient thermal management. BPI (Blind Power Identification) is a recent approach that determines the power consumption of different cores and the thermal…
Virtual Data Center (VDC) embedding has drawn significant attention recently because of growing need for efficient and flexible means of Data Center (DC) resource allocation. Existing studies on VDC embedding mainly focus on improving DCs'…
3D integrated circuit (3D-IC) technology gained acceptance due to the ability to achieve extremely high level of integration, where hundreds of ICs are stacked vertically. Such level of integration can result in local power dissipation of…
We introduce and experimentally validate a new macro-level model of the CPU temperature/power relationship within nanometer-scale application processors or system-on-chips. By adopting a holistic view, this model is able to take into…
Energy consumption is a growing issue in data centers, impacting their economic viability and their public image. In this work we empirically characterize the power and energy consumed by different types of servers. In particular, in order…
For beyond 2-D CMOS logic, various 3-D integration approaches specially transistor based 3-D integrations such as monolithic 3-D [1], Skybridge [2], SN3D [3] holds most promise. However, such 3D architectures within small form factor…
We present data exhibiting hot spots spontaneously emerging in forward biased thin film photovoltaics based on a-Si:H technology. These spots evolve over time shrinking in their diameter and increasing temperature up to approximately 300…
The consistent demand for better performance has lead to innovations at hardware and microarchitectural levels. 3D stacking of memory and logic dies delivers an order of magnitude improvement in available memory bandwidth. The price paid…
The race towards performance increase and computing power has led to chips with heterogeneous and complex designs, integrating an ever-growing number of cores on the same monolithic chip or chiplet silicon die. Higher integration density,…
In this paper we present EPIC, an efficient and effective predictor for IC manufacturing hotspots in deep sub-wavelength lithography. EPIC proposes a unified framework to combine different hotspot detection methods together, such as machine…