Related papers: Performance evaluation of FD-SOI Mosfets for diffe…
The total ionizing dose irradiation (TID) effects of partially depleted (PD) silicon-on-insulator (SOI)devices which fabricated with a commercial 0.2 um SOI process are investigated. Experimental results show an original phenomenon that the…
A widely used technique to mitigate the gate leakage in the ultra-scaled metal oxide semiconductor field effect transistors (MOSFETs) is the use of high-k dielectrics, which provide the same equivalent oxide thickness (EOT) as $\rm SiO_2$,…
This study simulated negative-capacitance double gate FinFETs with channel lengths ranging from 25nm to 100nm using TCAD. The results show that negative capacitance significantly reduces subthreshold swing as well as drain induced barrier…
Extensive electrical characterization of ring oscillators (ROs) made in high-$\kappa$ metal gate 28nm Fully-Depleted Silicon-on- Insulator (FD-SOI) technology is presented for a set of temperatures between 296 and 4.3K. First, delay per…
Self-heating (SHE) TCAD numerical simulations have been performed, for the first time, on 30nm FDSOI MOS transistors at extremely low temperatures. The self-heating temperature rise dTmax and the thermal resistance Rth are computed as…
We experimentally demonstrate a Si spin metal-oxide-semiconductor field-effect transistor (MOSFET) that exhibits a high on/off ratio of source-drain current and spin signals at room temperature. The spin channel is non-degenerate n-type Si,…
In recent years, a lot of scientific research effort has been put forth for the investigation of Transition Metal Dichalcogenides (TMDC) and other Two Dimensional (2D) materials like Graphene, Boron Nitride. Theoretical investigation on the…
Ballistic transport characteristics of metal-oxide semiconductor field effect transistors (MOSFETs) based on anisotropic two-dimensional (2-D) materials monolayer HfS2 and phosphorene are explored through quantum transport simulations. We…
Ferroelectric field-effect transistors employ a ferroelectric material as a gate insulator, the polarization state of which can be detected using the channel conductance of the device. As a result, the devices are of potential to use in…
Design considerations for a below 100 nm channel length SOI MOSFET with electrically induced shallow source/drain junctions are presented. Our simulation results demonstrate that the application of induced source/drain extensions to the SOI…
Gate oxide degradation is more critical in Silicon-Carbide (SiC) MOSFETs than in Silicon (Si) MOSFETs. This is because of the smaller gate oxide thickness and the higher electric field that develops across the gate oxide in SiC MOSFETs.…
Atomically thin semiconducting MoS2 is of great interest for high-performance flexible electronic and optoelectronic devices. Initial measurements using back-gated field-effect transistor (FET) structures on SiO2 yielded mobility of 1-50…
In this paper, a two-dimensional analytical model of a laterally graded-channel triple-metal double-gate Junctionless Field Effect Transistor with hetero dielectric gate oxide stack consisting of SiO$_2$ and HfO$_2$ is derived. The model…
In this work, quantum ballistic simulation study of a III-V tri-gate MOSFET has been presented. At the same time, effects of device parameter variation on ballistic, subthrshold and short channel performance is observed and presented. The…
We propose and numerically simulate novel reconfigurable logic gates employing spin metal-oxide-semiconductor field-effect transistors (spin MOSFETs). The output characteristics of the spin MOSFETs depend on the relative magnetization…
A compact model for the effect of parasitic internal fringe capacitance on threshold voltage in high-K gate dielectric SOI MOSFETs is developed. Our model includes the effects of the gate dielectric permittivity, spacer oxide permittivity,…
The tremendous progress in Metal Oxide Semiconductor (MOS) technology has been a direct consequence of device scaling for past several decades. But as we have entered the nanometer era many problems related to leakage currents and other…
Power dissipation has become a major obstacle in performance scaling of modern integrated circuits, and has spurred the search for devices operating at lower voltage swing. In this letter, we study p-i-n band-to-band tunneling field effect…
A dual mode device behaving either as a field-effect transistor or a single electron transistor (SET) has been fabricated using silicon-on-insulator metal oxide semiconductor technology. Depending on the back gate polarisation, an electron…
Topological insulator field-effect transistors (TIFETs) built on 2-D quantum spin Hall insulators are being considered as advanced logic transistors due to their potentially superior performance originating from the dissipationless edge…