Related papers: Model of tunneling transistors based on graphene o…
We demonstrate a technique to produce thin graphene layers on C-face of SiC under ultra high vacuum conditions. A stack of two SiC substrates comprising a half open cavity at the interface is used to partially confine the depleted Si atoms…
2D transition metal dichalcogenides (TMDs) have attracted a lot of attention recently for energy-efficient tunneling-field-effect transistor (TFET) applications due to their excellent gate control resulting from their atomically thin…
An energy gap can be opened in the electronic spectrum of graphene by lifting its sublattice symmetry. In bilayers, it is possible to open gaps as large as 0.2 eV. However, these gaps rarely lead to a highly insulating state expected for…
We present a technique to tune the charge density of epitaxial graphene via an electrostatic gate that is buried in the silicon carbide substrate. The result is a device in which graphene remains accessible for further manipulation or…
Two different points of view are available to understand the behavior of graphene at low energies. One is considering a large $N_F$ that makes graphene a semimetal, and another for small $N_F < 2.5$ that would make graphene a narrow gap…
A fitting model is developed for accounting the asymmetric ambipolarities in the I-V characteristics of graphene field-effect transistors (G-FETs) with doped channels, originating from the thermionic emission and interband tunneling at the…
Graphene is of interest in the development of next-generation electronics due to its high electron mobility, flexibility and stability. However, graphene transistors have poor on/off current ratios because of the absence of a bandgap. One…
Classical molecular-dynamics simulations were carried out to study epitaxial growth of graphene on 6H-SiC(0001) substrate. It was found that there exists a threshold annealing temperature above which we observe formation of graphitic…
Two-dimensional (2D) materials are particularly attractive to build the channel of next-generation field-effect transistors (FETs) with gate lengths below 10-15 nm. Because the 2D technology has not yet reached the same level of maturity as…
We demonstrate that the electronic gap of a graphene bilayer can be controlled externally by applying a gate bias. From the magneto-transport data (Shubnikov-de Haas measurements of the cyclotron mass), and using a tight binding model, we…
The electrical conductivity of suspended graphene has recently been measured for the first time, and found to behave as \sigma ~ \sqrt{|n|} as expected for Dirac quasiparticles at large carrier density. The charge inhomogeneity is strongly…
The continuous down-scaling of transistors has been the key to the successful development of current information technology. However, with Moore's law reaching its limits, the development of alternative transistor architectures is urgently…
Scientists are always yearning for new and exciting ways to unlock graphene's true potential. However, recent reports suggest this two-dimensional material may harbor some unique properties, making it a viable candidate for use in…
Graphene field-effect transistors are integrated with solution-processed multilayer hybrid organic-inorganic self-assembled nanodielectrics (SANDs). The resulting devices exhibit low-operating voltage (2 V), negligible hysteresis, current…
By means of catalytic chemical vapor deposition (CCVD) in-situ grown monolayer graphene field-effect transistors (MoLGFETs) and bilayer graphene transistors (BiLGFETs) are realized directly on oxidized silicon substrate without the need to…
We invented a method to fabricate graphene transistors on oxidized silicon wafers without the need to transfer graphene layers. To stimulate the growth of graphene layers on oxidized silicon a catalyst system of nanometer thin…
We demonstrate that the carrier concentration of epitaxial graphene devices grown on the C-face of a SiC substrate is efficiently modulated by a buried gate. The gate is fabricated via the implantation of nitrogen atoms in the SiC crystal,…
Graphene field-effect transistors are fabricated utilizing single-crystal hexagonal boron nitride (h-BN), an insulating isomorph of graphene, as the gate dielectric. The devices exhibit mobility values exceeding 10,000 cm2/V-sec and current…
An in vacuo thermal desorption process has been accomplished to form epitaxial graphene (EG) on 4H- and 6H-SiC substrates using a commercial chemical vapor deposition reactor. Correlation of growth conditions and the morphology and…
Graphene nanoribbon (GNR) field-effect transistors (FETs) with widths down to 12 nm have been fabricated by electron beam lithography using a wafer-scale chemical vapor deposition (CVD) process to form the graphene. The GNR FETs show…