Related papers: Development of Readout ASIC for FPCCD Vertex Detec…
For the International Large Detector (ILD) at the planned International Linear Collider (ILC) a Time Projection Chamber (TPC) is foreseen as the main tracking detector. To achieve the required point resolution, Micro Pattern Gaseous…
We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital…
We present the development of a single-photon detector and the connected read-out electronics. This `hybrid' detector is based on a vacuum tube, transmission photocathode, microchannel plate and a pixelated CMOS read-out anode encapsulating…
We present the prototype of a time-to-digital (TDC) ASIC for the upgrade of the ATLAS Monitored Drift Tube (MDT) detector for high-luminosity LHC operation. This ASIC is based on a previously submitted demonstrator ASIC designed for timing…
The basic principle of operation of silicon sensors with resistive read-out is built-in charge sharing. Resistive Silicon Detectors (RSD, also known as AC-LGAD), exploiting the signals seen on the electrodes surrounding the impact point,…
We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…
Results of detailed simulations of the charge transfer inefficiency of a prototype CCD chip are reported. The effect of radiation damage in a particle detector operating at a future accelerator is studied by examining two electron trap…
For the International Large Detector (ILD) at the planned International Linear Collider (ILC) a Time Projection Chamber (TPC) is foreseen as the main tracking detector. To achieve the required point resolution, Micro-Pattern Gaseous…
The ALICE ITS3 project foresees the use of ultra-light MAPS, developed in the 65 nm imaging process, for the vertex detector in the ALICE experiment at the LHC to drastically improve the vertexing performance. This new development,…
Charge Coupled Devices (CCDs) have been successfully used in several high energy physics experiments over the past two decades. Their high spatial resolution and thin sensitive layers make them an excellent tool for studying short-lived…
A large volume Time Projection Chamber (TPC) is being considered for the central charged particle tracker for the detector for the proposed International Linear Collider (ILC). To meet the ILC-TPC spatial resolution challenge of ~100…
The proposed Circular Electron Positron Collider (CEPC) imposes new challenges for the vertex detector in terms of high resolution, low material, fast readout and low power. The Monolithic Active Pixel Sensor (MAPS) technology has been…
A second monolithic silicon pixel prototype was produced for the MONOLITH project. The ASIC contains a matrix of hexagonal pixels with 100 {\mu}m pitch, readout by a low-noise and very fast SiGe HBT frontend electronics. Wafers with 50…
We present the first physical realization of in-pixel signal processing with integrated AI-based data filtering for particle tracking detectors. Building on prior work that demonstrated a physics-motivated edge-AI algorithm suitable for…
In this article, we describe the key features of the recently completed technical design for the International Linear Collider (ILC), a 200-500 GeV linear electron-positron collider (expandable to 1 TeV) that is based on 1.3 GHz…
We present our latest ASIC, which is used for the readout of Cadmium Telluride double-sided strip detectors (CdTe DSDs) and high spectroscopic imaging. It is implemented in a 0.35 um CMOS technology (X-Fab XH035), consists of 64 readout…
The TPC for the International Linear Collider (ILC) will need to measure about 200 track points with a transverse resolution close to 100 microns. The resolution goal is beyond the capability of the conventional proportional wire/cathode…
The CALICE collaboration is currently developing an engineering prototype of an analog hadron calorimeter for a future linear collider like the ILC. One main task of this prototype is to demonstrate the feasibility of building a realistic…
The present article introduces a novel ASIC architecture, designed in the context of the ATLAS Tile Calorimeter upgrade program for the High-Luminosity phase of the Large Hadron Collider at CERN. The architecture is based on…
The SiD concept is one of two proposed detectors to be mounted at the interaction region of the International Linear Collider (ILC). A substantial ILC background arises from low transverse momentum $\mathrm{e}^{+}\mathrm{e}^{-}$ pairs…