Related papers: InAs Nanowire MOS Capacitors
The capacitance of arrays of vertical wrapped-gate InAs nanowires are analyzed. With the help of a Poisson-Schr"odinger solver, information about the doping density can be obtained directly. Further features in the measured…
InAs nanowires have been actively explored as the channel material for high performance transistors owing to their high electron mobility and ease of ohmic metal contact formation. The catalytic growth of non-epitaxial InAs nanowires,…
This article is present the effected oxide capacitor in CMOS structure of integrated circuit level 5 micrometer technology. It has designed and basic structure of MOS diode. It establish with aluminum metallization layer by sputtering…
The electronic properties and nanostructure of InAs nanowires are correlated by creating multiple field effect transistors (FETs) on nanowires grown to have low and high defect density segments. 4.2 K carrier mobilities are ~4X larger in…
We report electrical conductance and thermopower measurements on InAs nanowires synthesized by chemical vapor deposition. Gate modulation of the thermopower of individual InAs nanowires with diameter around 20nm is obtained over T=40 to…
In-plane semiconductor nanowires with complex branched geometries, prepared via selective area growth (SAG), offer a versatile platform for advanced electronics, optoelectronics, and quantum devices. However, defects and disorder at the…
We report conductance and supercurrent of InAs nanowires coupled to Al-superconducting electrodes with short channel lengths and good Ohmic contacts. The nanowires are suspended 15\,nm above a local gate electrode. The charge density in the…
We study InAs nanowire resonators fabricated on sapphire substrate with a local gate configuration. The key advantage of using an insulating sapphire substrate is that it results in a reduced parasitic capacitance thus allowing both wide…
We report on fabrication of single-electron transistors using InAs nanowires with epitaxial aluminium with fixed tunnel barriers made of aluminium oxide. The devices exhibit a hard superconducting gap induced by the proximized aluminium…
The charge transport properties of single superconducting tin nanowires, encapsulated by multiwalled carbon nanotubes have been investigated by multi-probe measurements. The multiwalled carbon nanotube protects the tin nanowire from…
The thermal gradient along indium-arsenide nanowires was engineered by a combination of fabricated micro- trenches in the supporting substrate and focused laser irradiation. This allowed local control of thermally activated oxidation…
Electrical conductance through InAs nanowires is relevant for electronic applications as well as for fundamental quantum experiments. Here we employ nominally undoped, slightly tapered InAs nanowires to study the diameter dependence of…
Ability to understand and model the performance limits of nanowire transistors is the key to design of next generation devices. Here, we report studies on high-mobility junction-less gate-all-around nanowire field effect transistor with…
Nanowire heterostructures define high-quality few-electron quantum dots for nanoelectronics, spintronics and quantum information processing. We use a cooled scanning probe microscope (SPM) to image and control an InAs quantum dot in an…
We demonstrate the Au-assisted growth of semiconductor nanowires on different engineered substrates. Two relevant cases are investigated: GaAs/AlGaAs heterostructures capped by a $50 {\rm nm}$-thick InAs layer grown by molecular beam…
Integration of high quality semiconductor-superconductor devices into scalable and CMOS compatible architectures remains an outstanding challenge, currently hindering their practical implementation. Here, we demonstrate growth of InAs…
We have fabricated crystalline nanowires of VO_2 using a new synthetic method. A nanowire synthesized at 650^oC shows the semiconducting behavior and a nanowire at 670^oC exhibits the first-order metal-insulator transition which is not the…
The native oxide at the surface of III-V nanowires, such as InAs, can be a major source of charge noise and scattering in nanowire-based electronics, particularly for quantum devices operated at low temperatures. Surface passivation…
Nanoscale size-effects drastically alter the fundamental properties of semiconductors. Here, we investigate the dominant role of quantum confinement in the field-effect device properties of free-standing InAs nanomembranes with varied…
We report a method for making horizontal wrap-gate nanowire transistors with up to four independently controllable wrap-gated segments. While the step up to two independent wrap-gates requires a major change in fabrication methodology, a…