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Elliptic Curve Cryptography (ECC) is widely accepted for ensuring secure data exchange between resource-limited IoT devices. The National Institute of Standards and Technology (NIST) recommended implementation, such as B-163, is…

Hardware Architecture · Computer Science 2025-06-17 Ruby Kumari , Tapas Rout , Babul Saini , Jai Gopal Pandey , Abhijit Karmakar

Efficient computation of the Tate pairing is an important part of pairing-based cryptography. Recently with the introduction of the Duursma-Lee method special attention has been given to the fields of characteristic 3. Especially…

Cryptography and Security · Computer Science 2007-08-23 Elisa Gorla , Christoph Puttmann , Jamshid Shokrollahi

Finite field multiplier is mainly used in error-correcting codes and signal processing. Finite field multiplier is regarded as the bottleneck arithmetic unit for such applications and it is the most complicated operation over finite field…

Information Theory · Computer Science 2023-09-15 Saeideh Nabipour , Gholamreza Zare Fatin , Javad Javidan

Securing communication channels is especially needed in wireless environments. But applying cipher mechanisms in software is limited by the calculation and energy resources of the mobile devices. If hardware is applied to realize…

Cryptography and Security · Computer Science 2011-11-09 Zoya Dyka , Peter Langendoerfer

While the Karatsuba algorithm reduces the complexity of large integer multiplication, the extra additions required minimize its benefits for smaller integers of more commonly-used bitwidths. In this work, we propose the extension of the…

Hardware Architecture · Computer Science 2025-01-16 Trevor E. Pogue , Nicola Nicolici

We introduce a new class of irreducible pentanomials over $\mathbb{F}_2$ of the form $f(x) = x^{2b+c} + x^{b+c} + x^b + x^c + 1$. Let $m=2b+c$ and use $f$ to define the finite field extension of degree $m$. We give the exact number of…

Number Theory · Mathematics 2018-11-13 Gustavo Banegas , Ricardo Custodio , Daniel Panario

Floating point multiplication is a crucial operation in high power computing applications such as image processing, signal processing etc. And also multiplication is the most time and power consuming operation. This paper proposes an…

Hardware Architecture · Computer Science 2019-12-17 S Arish , R. K. Sharma

We set new speed records for multiplying long polynomials over finite fields of characteristic two. Our multiplication algorithm is based on an additive FFT (Fast Fourier Transform) by Lin, Chung, and Huang in 2014 comparing to previously…

Symbolic Computation · Computer Science 2018-01-08 Ming-Shing Chen , Chen-Mou Cheng , Po-Chun Kuo , Wen-Ding Li , Bo-Yin Yang

We improve the space complexity of Karatsuba multiplication on a quantum computer from $O(n^{1.427})$ to $O(n)$ while maintaining $O(n^{\lg 3})$ gate complexity. We achieve this by ensuring recursive calls can add their outputs directly…

Quantum Physics · Physics 2019-04-17 Craig Gidney

Integer arithmetic is the underpinning of many quantum algorithms, with applications ranging from Shor's algorithm over HHL for matrix inversion to Hamiltonian simulation algorithms. A basic objective is to keep the required resources to…

Quantum Physics · Physics 2017-06-13 Alex Parent , Martin Roetteler , Michele Mosca

In this paper, two approximate 3*3 multipliers are proposed and the synthesis results of the ASAP-7nm process library justify that they can reduce the area by 31.38% and 36.17%, and the power consumption by 36.73% and 35.66% compared with…

Hardware Architecture · Computer Science 2022-11-17 Yao Lu , Jide Zhang , Su Zheng , Zhen Li , Lingli Wang

Multipliers are widely-used arithmetic operators in digital signal processing and machine learning circuits. Due to their relatively high complexity, they can have high latency and be a significant source of power consumption. One strategy…

Hardware Architecture · Computer Science 2023-10-17 Shervin Vakili , Mobin Vaziri , Amirhossein Zarei , J. M. Pierre Langlois

The rapid updates in error-resilient applications along with their quest for high throughput have motivated designing fast approximate functional units for Field-Programmable Gate Arrays (FPGAs). Studies that proposed imprecise functional…

Hardware Architecture · Computer Science 2022-06-29 Zahra Ebrahimi , Muhammad Zaid , Mark Wijtvliet , Akash Kumar

A representation of finite fields that has proved useful when implementing finite field arithmetic in hardware is based on an isomorphism between subrings and fields. In this paper, we present an unified formulation for multiplication in…

Discrete Mathematics · Computer Science 2008-07-24 Francisco Arguello

Various post-quantum cryptography algorithms have been recently proposed. Supersingluar isogeny Diffie-Hellman key exchange (SIKE) is one of the most promising candidates due to its small key size. However, the SIKE scheme requires numerous…

Hardware Architecture · Computer Science 2020-11-30 Yeonsoo Jeon , Dongsuk Jeon

In todays world, high-power computing applications such as image processing, digital signal processing, graphics, and robotics require enormous computing power. These applications use matrix operations, especially matrix multiplication.…

Hardware Architecture · Computer Science 2019-10-29 Arish S , R. K. Sharma

The finite field multiplier is mainly used in many of today's state of the art digital systems and its hardware implementation for bit parallel operation may require millions of logic gates. Natural causes or soft errors in digital design…

Information Theory · Computer Science 2023-03-15 Saeideh Nabipour , Javad Javidan , Gholamreza Zare Fatin

We propose a Recursive Polynomial Generic Construction (RPGC) of multiplication algorithms in any finite field $\mathbb{F}_{q^n}$ based on the method of D.V. and G.V. Chudnovsky specialized on the projective line. They are usual polynomial…

Algebraic Geometry · Mathematics 2021-11-18 Stéphane Ballet , Alexis Bonnecaze , Bastien Pacifico

In this paper, we present an energy-efficient, yet high-speed approximate maximally redundant signed digit (MRSD) multiplier (called AMR-MUL) based on a parallel structure. For the reduction stage, we suggest several approximate Full-Adder…

Hardware Architecture · Computer Science 2022-08-31 Saba Amanollahi , Mehdi Kamal , Ali-Afzali-Kusha , Massoud Pedram

In this paper, we propose an architecture/methodology for making FPGAs suitable for integer as well as variable precision floating point multiplication. The proposed work will of great importance in applications which requires variable…

Hardware Architecture · Computer Science 2007-11-19 Himanshu Thapliyal , Hamid R. Arabnia , Rajnish Bajpai , Kamal K. Sharma
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