Related papers: Using Multi-Threshold Threshold Gates in RTD-based…
Quantum gates based on geometric phases possess intrinsic noise-resilience features and therefore attract much attention. However, the implementations of previous geometric quantum computation typically require a long pulse time of gates.…
We propose a scheme for the fault-tolerant implementation of arbitrary Clifford circuits. To achieve this, we extend previous work on flag gadgets for syndrome extraction to a general framework that flags any Clifford circuit. This…
This paper presents a design flow for an improved selective multi-threshold(Selective-MT) circuit. The Selective-MT circuit is improved so that plural MT-cells can share one switch transistor. We propose the design methodology from…
Semiconductor supply chain is increasingly getting exposed to variety of security attacks such as Trojan insertion, cloning, counterfeiting, reverse engineering (RE), piracy of Intellectual Property (IP) or Integrated Circuit (IC) and…
We present overlapping top gate electrodes for the formation of gate defined lateral junctions in semiconducting layers as an alternative to the back gate/top gate combination and to the split gate configuration. The optical lithography…
Junctionless oxide-based neuron thin-film transistors with in-plane-gate structure are fabricated at room temperature with a laser scribing process. The neuron transistors are composed of a bottom ITO floating gate and multiples of two…
Truly polymorphic circuits, whose functionality/circuit behavior can be altered using a control variable, can provide tremendous benefits in multi-functional system design and resource sharing. For secure and fault tolerant hardware designs…
In order to perform universal fault-tolerant quantum computation, one needs to implement a logical non-Clifford gate. Consequently, it is important to understand codes that implement such gates transversally. In this paper, we adopt an…
In a family of experiments carried on all-metallic supercurrent nano-transistors a surprising gating effect has been recently shown. These include the full suppression of the critical supercurrent, the increase of quasiparticle population,…
Trapped-ion qubits are a leading technology for practical quantum computing. In this work, we present an architectural analysis of a linear-tape architecture for trapped ions. In order to realize our study, we develop and evaluate mapping…
Transversal gates are the simplest form of fault-tolerant gates and are relatively easy to implement in practice. Yet designing codes that support useful transversal operations -- especially non-Clifford or addressable gates -- remains…
With the advent of physical qubits exhibiting strong noise bias, it becomes increasingly relevant to identify which quantum gates can be efficiently implemented on error-correcting codes designed to address a single dominant error type.…
Trapped ions (TI) are a leading candidate for building Noisy Intermediate-Scale Quantum (NISQ) hardware. TI qubits have fundamental advantages over other technologies such as superconducting qubits, including high qubit quality, coherence…
The end of Moore's law for CMOS technology has prompted the search for low-power computing alternatives, resulting in several promising proposals based on magnetic logic[1-8]. One approach aims at tailoring arrays of nanomagnetic islands in…
Atomically-thin 2D semiconducting materials integrated into van der Waals heterostructures have enabled architectures that hold great promise for next generation nanoelectronics. However, challenges still remain to enable their full…
The memory physics induced unknown offset of the channel is a critical and difficult issue to be tackled for many non-volatile memories (NVMs). In this paper, we first propose novel neural network (NN) detectors by using the multilayer…
This paper describes the design and characteristics of monolithically integrated three-terminal gated III-Nitride light emitting diodes (LEDs) devices. The impact of channel doping and thickness on the voltage penalty of the transistor-LED…
Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transistors (MOSFETs) are facing significant limitations as device scaling reaches the limits of Moore's Law. These…
We present a theory of the graphene nanoslide, a fundamental device for graphene straintronics that realizes a single pseudogauge barrier. We solve the scattering problem in closed form and demonstrate that the nanoslide gives rise to a…
The performance limits of the multilayer graphene nanoribbon (GNR) field-effect transistor (FET) are assessed and compared to those of monolayer GNR FET and carbon nanotube (CNT) FET. The results show that with a thin high-k gate insulator…