Related papers: Cell Architecture for Nanoelectronic Design
Down-scaling device dimensions to the nanometer range raises significant challenges to traditional device design, due to potential current leakage across nanoscale dimensions and the need to maintain reproducibility while dealing with…
Network-based biocomputation (NBC) is an alternative parallel computing paradigm that encodes combinatorial problems into a nanofabricated device's graphical network of channels, enabling cytoskeletal filaments propelled by molecular motors…
In this short review, I draw attention to new developments in the theory of fault tolerance in quantum computation that may give concrete direction to future work in the development of superconducting qubit systems. The basics of quantum…
Fifth-generation (5G) wireless networks introduce new architectural paradigms, spectrum usage models, and optimization challenges to support enhanced mobile broadband, massive machine-type communications, and ultra-reliable low-latency…
In this paper, we aim to maximize the energy efficiency of cellular wireless networks. Specifically, we address the power allocation problem in multi-cell multi-carrier systems. Considering realistic base station power consumption models,…
The past few decades have seen exponential growth in capabilities of digital electronics primarily due to the ability to scale Integrated Circuits (ICs) to smaller dimensions while attaining power and performance benefits. That scalability…
We propose a fault-tolerant quantum computer architecture for trapped-ion devices, which we call the walking cat architecture. Our blueprint includes a compiler, a detailed description of all the quantum error-correction protocols, a…
Networks of silicon nanowires possess intriguing electronic properties surpassing the predictions based on quantum confinement of individual nanowires. Employing large-scale atomistic pseudopotential computations, as yet unexplored branched…
Wireless systems, which include cellular phones, have become an essential part of the modern life. However the mounting evidence that cellular radiation might adversely affect the health of its users, leads to a growing concern among…
An all-digital comparator with full input range is presented. It outperforms the nowaday all-digital comparators with its large rail-to-rail input range. This is achieved by the proposed Yin-yang balance mechanism between the two logic…
We propose a novel theoretical biomolecular design to implement any Boolean circuit using the mechanism of DNA strand displacement. The design is scalable: all species of DNA strands can in principle be mixed and prepared in a single test…
This paper presents the Neural Cache architecture, which re-purposes cache structures to transform them into massively parallel compute units capable of running inferences for Deep Neural Networks. Techniques to do in-situ arithmetic in…
Over the past decades, the relentless scaling and mass production of flash memory have underpinned the data-centric era. Yet charge-trap-based 3D NAND flash is now constrained by intrinsic physical and architectural limits, including…
Resistivity augmentation in nanoscale metal interconnects is a performance limiting factor in integrated circuits. Here we present calculations of electron scattering and transmission at the interface between Cu interconnects and their…
Our goal is to electronically regulate electrochemical cells. For this, we introduced a third element, called the gate, which was placed between the cathode and the anode electrodes of the cell. Voltage applied to this element controlled…
Co-exploration of neural architectures and hardware design is promising to simultaneously optimize network accuracy and hardware efficiency. However, state-of-the-art neural architecture search algorithms for the co-exploration are…
This paper presents a microkernel architecture for constraint programming organized around a number of small number of core functionalities and minimal interfaces. The architecture contrasts with the monolithic nature of many…
Two-dimensional (2D) semiconductors have been suggested both for ultimately-scaled field-effect transistors (FETs) and More-than-Moore nanoelectronics. However, these targets can not be reached without accompanying gate insulators which are…
We address the challenge of implementing reliable computation of Boolean functions in future nanocircuit fabrics. Such fabrics are projected to have very high defect rates. We overcome this limitation by using a combination of cheap but…
Full connectivity of qubits is necessary for most quantum algorithms, which is difficult to directly implement on Noisy Intermediate-Scale Quantum processors. However, inserting swap gate to enable the two-qubit gates between uncoupled…