Related papers: Cell Architecture for Nanoelectronic Design
Knill demonstrated a fault-tolerant quantum computation scheme based on concatenated error-detecting codes and postselection with a simulated error threshold of 3% over the depolarizing channel. %We design a two-dimensional architecture for…
Multi-controlled single-target (MC) gates are some of the most crucial building blocks for varied quantum algorithms. How to implement them optimally is thus a pivotal question. To answer this question in an architecture-independent manner,…
At advanced process nodes, lithography weakpoints can exist in physical layouts of integrated circuit designs even if the layouts pass design rule checking (DRC). Existence of lithography weakpoints in a physical layout can cause…
Recurrent transducer models have emerged as a promising solution for speech recognition on the current and next generation smart devices. The transducer models provide competitive accuracy within a reasonable memory footprint alleviating…
In this paper we present NANOTCAD2D, a code for the simulation of the electrical properties of semiconductor-based nanoelectronic devices and structures in two-dimensional domains. Such code is based on the solution of the…
A high accuracy and high sensitivity system architecture is proposed for the read-out circuit of electrical impedance tomography system-on-chip. The switched ratiometric technique is applied in the proposed architecture. The proposed system…
Thermoelectric effects are envisioned to reduce programming currents in nanopillar phase change memory cells. However, due to the inherent symmetry in such a structure, the contribution due to thermoelectric effects on programming currents…
Superconducting quantum devices are a leading technology for quantum computation, but they suffer from several challenges. Gate errors, coherence errors and a lack of connectivity all contribute to low fidelity results. In particular,…
Power consumption is a key challenge in millimeter wave (mmWave) receiver front-ends, due to the need to support high dimensional antenna arrays at wide bandwidths. Recently, there has been considerable work in developing low-power…
Two-scale topology optimization, combined with the design of microstructure families with a broad range of effective material parameters, is increasingly widely used in many fabrication applications to achieve a target deformation behavior…
Complementary metal oxide semiconductor technology (CMOS) has been faced critical challenges in nano-scale regime. CNTFET (Carbon Nanotube Field effect transistor) technology is a promising alternative for CMOS technology. In this paper, we…
Searching of optimal parameters of nanoelectronic devices is a primal problem in their modeling. We solve this problem on example of the electron ballistic switch in quantum network model. For this purpose, we use a computing scheme in…
A three-dimensional (3D) Network-on-Chip (NoC) enables the design of high performance and low power many-core chips. Existing 3D NoCs are inadequate for meeting the ever-increasing performance requirements of many-core processors since they…
Trapped ions (TI) are a leading candidate for building Noisy Intermediate-Scale Quantum (NISQ) hardware. TI qubits have fundamental advantages over other technologies such as superconducting qubits, including high qubit quality, coherence…
The current work explores a geometrically engineered dual gate GaAs nanowire FET with state of the art miniaturized dimensions for high performance charge qubit operation at room temperature. Relevant gate voltages in such device can create…
This paper describes a complex networks approach to study the failure tolerance of mechatronic software systems under various types of hardware and/or software failures. We produce synthetic system architectures based on evidence of modular…
Nano-scaled metallic or dielectric structures may provide various ways to trap light into thin-film solar cells for improving the conversion efficiency. In most schemes, the textured active layers are involved into light trapping structures…
In this work we propose a ratchet effect which provides a general means of performing clocked logic operations on discrete particles, such as single electrons or vortices. The states are propagated through the device by the use of an…
Recent work has shown that out-of-order and speculative execution mechanisms used to increase performance in the majority of processors expose the processors to critical attacks. These attacks, called Meltdown and Spectre, exploit the side…
The thermoelectric power factor of hierarchically nanostructured materials is investigated using the nonequilibrium Greens function method for quantum transport, including interactions of electrons with acoustic and optical phonons. We…