English

Unsupervised ANN-Based Equalizer and Its Trainable FPGA Implementation

Signal Processing 2023-07-31 v2 Hardware Architecture Distributed, Parallel, and Cluster Computing Machine Learning

Abstract

In recent years, communication engineers put strong emphasis on artificial neural network (ANN)-based algorithms with the aim of increasing the flexibility and autonomy of the system and its components. In this context, unsupervised training is of special interest as it enables adaptation without the overhead of transmitting pilot symbols. In this work, we present a novel ANN-based, unsupervised equalizer and its trainable field programmable gate array (FPGA) implementation. We demonstrate that our custom loss function allows the ANN to adapt for varying channel conditions, approaching the performance of a supervised baseline. Furthermore, as a first step towards a practical communication system, we design an efficient FPGA implementation of our proposed algorithm, which achieves a throughput in the order of Gbit/s, outperforming a high-performance GPU by a large margin.

Keywords

Cite

@article{arxiv.2304.06987,
  title  = {Unsupervised ANN-Based Equalizer and Its Trainable FPGA Implementation},
  author = {Jonas Ney and Vincent Lauinger and Laurent Schmalen and Norbert Wehn},
  journal= {arXiv preprint arXiv:2304.06987},
  year   = {2023}
}

Comments

Accepted and presented at Joint European Conference on Networks and Communications & 6G Summit (EuCNC/6G Summit), Gothenburg, Sweden, 6 - 9 June 2023; Published in IEEE Xplore: https://ieeexplore.ieee.org/document/10188269

R2 v1 2026-06-28T10:05:46.364Z