Single-port ferroelectric FET (FeFET) that performs write and read operations on the same electrical gate prevents its wide application in tunable analog electronics and suffers from read disturb, especially to the high-threshold voltage (VTH) state as the retention energy barrier is reduced by the applied read bias. To address both issues, we propose to adopt a read disturb-free dual-port FeFET where write is performed on the gate featuring a ferroelectric layer and the read is done on a separate gate featuring a non-ferroelectric dielectric. Combining the unique structure and the separate read gate, read disturb is eliminated as the applied field is aligned with polarization in the high-VTH state and thus improving its stability, while it is screened by the channel inversion charge and exerts no negative impact on the low-VTH state stability. Comprehensive theoretical and experimental validation have been performed on fully-depleted silicon-on-insulator (FDSOI) FeFETs integrated on 22 nm platform, which intrinsically has dual ports with its buried oxide layer acting as the non-ferroelectric dielectric. Novel applications that can exploit the proposed dual-port FeFET are proposed and experimentally demonstrated for the first time, including FPGA that harnesses its read disturb-free feature and tunable analog electronics (e.g., frequency tunable ring oscillator in this work) leveraging the separated write and read paths.
@article{arxiv.2305.01484,
title = {Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET},
author = {Zijian Zhao and Shan Deng and Swetaki Chatterjee and Zhouhang Jiang and Muhammad Shaffatul Islam and Yi Xiao and Yixin Xu and Scott Meninger and Mohamed Mohamed and Rajiv Joshi and Yogesh Singh Chauhan and Halid Mulaosmanovic and Stefan Duenkel and Dominik Kleimaier and Sven Beyer and Hussam Amrouch and Vijaykrishnan Narayanan and Kai Ni},
journal= {arXiv preprint arXiv:2305.01484},
year = {2023}
}