RRAM technology has experienced explosive growth in the last decade, with multiple device structures being developed for a wide range of applications. However, transitioning the technology from the lab into the marketplace requires the development of an accessible and user-friendly design flow, supported by an industry-grade toolchain. In this work, we demonstrate with examples an end-to-end design flow for RRAM-based electronics, from the introduction of a custom RRAM model into our chosen CAD tool to performing layout-versus-schematic and post-layout checks including the RRAM device. We envisage that this step-by-step guide to introducing RRAM into the standard integrated circuit design flow will be a useful reference document for both device developers who wish to benchmark their technologies and circuit designers who wish to experiment with RRAM-enhanced systems.
@article{arxiv.2012.02267,
title = {Hybrid CMOS/Memristor Circuit Design Methodology},
author = {Sachin Maheshwari and Spyros Stathopoulos and Jiaqi Wang and Alexander Serb and Yihan Pan and Andrea Mifsud and Lieuwe B. Leene and Jiawei Shen and Christos Papavassiliou and Timothy G. Constandinou and Themistoklis Prodromakis},
journal= {arXiv preprint arXiv:2012.02267},
year = {2024}
}
Comments
This work has been accepted to the IEEE TCAS-I for possible publication