English

Hardware for converting floating-point to the microscaling (MX) format

Hardware Architecture 2024-11-06 v1

Abstract

This paper proposes hardware converters for the microscaling format (MX-format), a reduced representation of floating-point numbers. We present an algorithm and a memory-free hardware model for converting 32 single-precision floating-point numbers to MX-format. The proposed model supports six different types of MX-format: E5M2, E4M3, E3M2, E2M3, E2M1, and INT8. The conversion process consists of three steps: calculating the maximum absolute value among 32 inputs, generating a shared scale, and producing 32 outputs in the selected MX-format type. The hardware converters were implemented in FPGA, and experimental results demonstrate.

Keywords

Cite

@article{arxiv.2411.03149,
  title  = {Hardware for converting floating-point to the microscaling (MX) format},
  author = {Danila Gorodecky and Leonel Sousa},
  journal= {arXiv preprint arXiv:2411.03149},
  year   = {2024}
}

Comments

this 6-page paper was never published or submitted anywhere. Submitted 05.11.2024

R2 v1 2026-06-28T19:48:59.812Z