EPAC: The Last Dance
Abstract
This paper presents EPAC, a RISC-V-based accelerator chip developed within the European Processor Initiative (EPI) as part of a multi-year, multi-partner effort to build a European HPC processor ecosystem. EPAC is implemented in GlobalFoundries 22FDX (GF22FDX) technology, covers an area of 27 sq mm with approximately 0.3 billion transistors, and integrates three distinct RISC-V compute tiles targeting different workload classes: VEC, a vector processing tile for double-precision HPC workloads; STX, a many-core tile optimized for stencil and machine learning computations; and VRP, a variable-precision tile for iterative numerical solvers requiring extended floating-point formats. All tiles are connected through a Coherent Hub Interface (CHI) based network-on-chip with a distributed L2 cache system and communicate with external memory via a SerDes link. The chip was taped out in GF22FDX technology and successfully brought up, with all major IP blocks validated. This paper describes the architecture of each tile and the uncore infrastructure, the integration and physical implementation process, and the board-level bring-up activities. It also reflects on the engineering and coordination lessons learned from a full chip design effort distributed across academic and industrial partners in Europe.
Keywords
Cite
@article{arxiv.2604.12715,
title = {EPAC: The Last Dance},
author = {Filippo Mantovani and Fabio Banchelli and Pablo Vizcaino and Roger Ferrer and Oscar Palomar and Francesco Minervini and Jesus Labarta and Mauro Olivieri and Sebastiano Pomata and Pedro Marcuello and Jordi Cortina and Alberto Moreno and Josep Sans and Roger Espasa and Vassilis Papaefstathiou and Nikolaos Dimou and Georgios Ieronymakis and Antonis Psathakis and Michalis Giaourtas and Iasonas Mastorakis and Manolis Marazakis and Eric Guthmuller and Andrea Bocco and Jérôme Fereyre and César Fuguet and Mate Kovač and Mario Kovač and Luka Mrković and Josip Ramljak and Luca Bertaccini and Tim Fischer and Frank K. Gurkaynak and Paul Scheffler and Luca Benini and Bhavishya Goel and Madhavan Manivannan and Tiago Rocha and Nuno Neves and Jens Krüger},
journal= {arXiv preprint arXiv:2604.12715},
year = {2026}
}
Comments
Invited Paper. In Proceedings of the 23rd ACM International Conference on Computing Frontiers (CF Companion '26 ), May 19-21, 2026, Catania, Italy