A Context-Switching/Dual-Context ROM Augmented RAM using Standard 8T SRAM
Abstract
The landscape of emerging applications has been continually widening, encompassing various data-intensive applications like artificial intelligence, machine learning, secure encryption, Internet-of-Things, etc. A sustainable approach toward creating dedicated hardware platforms that can cater to multiple applications often requires the underlying hardware to context-switch or support more than one context simultaneously. This paper presents a context-switching and dual-context memory based on the standard 8T SRAM bit-cell. Specifically, we exploit the availability of multi-VT transistors by selectively choosing the read-port transistors of the 8T SRAM cell to be either high-VT or low-VT. The 8T SRAM cell is thus augmented to store ROM data (represented as the VT of the transistors constituting the read-port) while simultaneously storing RAM data. Further, we propose specific sensing methodologies such that the memory array can support RAM-only or ROM-only mode (context-switching (CS) mode) or RAM and ROM mode simultaneously (dual-context (DC) mode). Extensive Monte-Carlo simulations have verified the robustness of our proposed ROM-augmented CS/DC memory on the Globalfoundries 22nm-FDX technology node.
Cite
@article{arxiv.2304.02908,
title = {A Context-Switching/Dual-Context ROM Augmented RAM using Standard 8T SRAM},
author = {Md Abdullah-Al Kaiser and Edwin Tieu and Ajey P. Jacob and Akhilesh R. Jaiswal},
journal= {arXiv preprint arXiv:2304.02908},
year = {2023}
}