Hardware Architecture · Computer Science
PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro with In-Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout
Zhiyu Chen, Ziyuan Wen, Weier Wan, Akhil Reddy Pakala +5
2024-07-19
Hardware Architecture · Computer Science
A Digital SRAM-Based Compute-In-Memory Macro for Weight-Stationary Dynamic Matrix Multiplication in Transformer Attention Score Computation
Jianyi Yu, Tengxiao Wang, Yuxuan Wang, Xiang Fu +5
2025-12-15
Hardware Architecture · Computer Science
A 65nm 8b-Activation 8b-Weight SRAM-Based Charge-Domain Computing-in-Memory Macro Using A Fully-Parallel Analog Adder Network and A Single-ADC Interface
Guodong Yin, Mufeng Zhou, Yiming Chen, Wenjun Tang +8
2024-04-03
Hardware Architecture · Computer Science
Memory-Immersed Collaborative Digitization for Area-Efficient Compute-in-Memory Deep Learning
Shamma Nasrin, Maeesha Binte Hashem, Nastaran Darabi, Benjamin Parpillon +3
2023-07-11
Hardware Architecture · Computer Science
A 137.5 TOPS/W SRAM Compute-in-Memory Macro with 9-b Memory Cell-Embedded ADCs and Signal Margin Enhancement Techniques for AI Edge Applications
Xiaomeng Wang, Fengshi Tian, Xizi Chen, Jiakun Zheng +6
2023-07-20
Hardware Architecture · Computer Science
IMAGINE: An 8-to-1b 22nm FD-SOI Compute-In-Memory CNN Accelerator With an End-to-End Analog Charge-Based 0.15-8POPS/W Macro Featuring Distribution-Aware Data Reshaping
Adrian Kneip, Martin Lefebvre, Pol Maistriaux, David Bol
2024-12-30
Hardware Architecture · Computer Science
An Event-Based Digital Compute-In-Memory Accelerator with Flexible Operand Resolution and Layer-Wise Weight/Output Stationarity
Nicolas Chauvaux, Adrian Kneip, Christoph Posch, Kofi Makinwa +1
2024-10-31
Hardware Architecture · Computer Science
GEM3D CIM General Purpose Matrix Computation Using 3D Integrated SRAM eDRAM Hybrid Compute In Memory on Memory Architecture
Subhradip Chakraborty, Ankur Singh, Akhilesh R. Jaiswal
2026-04-16
Hardware Architecture · Computer Science
4T2R X-ReRAM CiM Array for Variation-tolerant, Low-power, Massively Parallel MAC Operation
Fuyuki Kihara, Seiji Uenohara, Satoshi Awamura, Naoko Misawa +2
2025-07-21
Machine Learning · Computer Science
PR-CIM: a Variation-Aware Binary-Neural-Network Framework for Process-Resilient Computation-in-memory
Minh-Son Le, Thi-Nhan Pham, Thanh-Dat Nguyen, Ik-Joon Chang
2021-10-20
Hardware Architecture · Computer Science
DDC-PIM: Efficient Algorithm/Architecture Co-design for Doubling Data Capacity of SRAM-based Processing-In-Memory
Cenlin Duan, Jianlei Yang, Xiaolin He, Yingjie Qi +8
2023-11-01
Hardware Architecture · Computer Science
CAP-RAM: A Charge-Domain In-Memory Computing 6T-SRAM for Accurate and Precision-Programmable CNN Inference
Zhiyu Chen, Zhanghao Yu, Qing Jin, Yan He +5
2021-07-07
Signal Processing · Electrical Eng. & Systems
Time--to--Digital Converter (TDC)--Based Resonant Compute--in--Memory for INT8 CNNs with Layer--Optimized SRAM Mapping
Dhandeep Challagundla, Ignatius Bezzam, Riadul Islam
2026-01-05
Hardware Architecture · Computer Science
A Review of SRAM-based Compute-in-Memory Circuits
Kentaro Yoshioka, Shimpei Ando, Satomi Miyagi, Yung-Chin Chen +1
2024-11-25
Hardware Architecture · Computer Science
HCiM: ADC-Less Hybrid Analog-Digital Compute in Memory Accelerator for Deep Learning Workloads
Shubham Negi, Utkarsh Saxena, Deepika Sharma, Kaushik Roy
2024-03-21
Emerging Technologies · Computer Science
High-Throughput In-Memory Computing for Binary Deep Neural Networks with Monolithically Integrated RRAM and 90nm CMOS
Shihui Yin, Xiaoyu Sun, Shimeng Yu, Jae-sun Seo
2020-10-28
Hardware Architecture · Computer Science
TL-nvSRAM-CIM: Ultra-High-Density Three-Level ReRAM-Assisted Computing-in-nvSRAM with DC-Power Free Restore and Ternary MAC Operations
Dengfeng Wang, Liukai Xu, Songyuan Liu, Zhi Li +4
2024-01-12
Hardware Architecture · Computer Science
IMPULSE: A 65nm Digital Compute-in-Memory Macro with Fused Weights and Membrane Potential for Spike-based Sequential Learning Tasks
Amogh Agrawal, Mustafa Ali, Minsuk Koo, Nitin Rathi +2
2021-07-09
Hardware Architecture · Computer Science
MARS: Multi-macro Architecture SRAM CIM-Based Accelerator with Co-designed Compressed Neural Networks
Syuan-Hao Sie, Jye-Luen Lee, Yi-Ren Chen, Chih-Cheng Lu +3
2021-05-26
Hardware Architecture · Computer Science
Acore-CIM: build accurate and reliable mixed-signal CIM cores with RISC-V controlled self-calibration
Omar Numan, Gaurav Singh, Kazybek Adam, Jelin Leslin +5
2026-04-15
Hardware Architecture · Computer Science
OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration
Yung-Chin Chen, Shimpei Ando, Daichi Fujiki, Shinya Takamaeda-Yamazaki +1
2023-11-22