In this paper, we propose a high-precision SRAM-based CIM macro that can perform 4x4-bit MAC operations and yield 9-bit signed output. The inherent discharge branches of SRAM cells are utilized to apply time-modulated MAC and 9-bit ADC readout operations on two bit-line capacitors. The same principle is used for both MAC and A-to-D conversion ensuring high linearity and thus supporting large number of analog MAC accumulations. The memory cell-embedded ADC eliminates the use of separate ADCs and enhances energy and area efficiency. Additionally, two signal margin enhancement techniques, namely the MAC-folding and boosted-clipping schemes, are proposed to further improve the CIM computation accuracy.
@article{arxiv.2307.05944,
title = {A 137.5 TOPS/W SRAM Compute-in-Memory Macro with 9-b Memory Cell-Embedded ADCs and Signal Margin Enhancement Techniques for AI Edge Applications},
author = {Xiaomeng Wang and Fengshi Tian and Xizi Chen and Jiakun Zheng and Xuejiao Liu and Fengbin Tu and Jie Yang and Mohamad Sawan and Kwang-Ting Cheng and Chi-Ying Tsui},
journal= {arXiv preprint arXiv:2307.05944},
year = {2023}
}