Brain-inspired computation promises complex cognitive tasks at biological energy efficiencies. The brain contains 104 synapses per neuron. Hence, ultra-low energy, high-density synapses are needed for spiking neural networks (SNN). In this paper, we use tunneling enabled CTF (Charge Trap Flash) stack for ultra-low-energy operation (1F); Further, CTF on an SOI platform and back-to-back connected pn diode and Zener diode (2D) prevent parasitic leakage to preserve energy advantage in array operation. A bulk 100μm x 100μm CTF operation offers tunable, gradual conductance change (ΔG)i.e.104levels, which gives 100x improvement over literature. SPICE simulations of 1F2D synapse shows ultra-low energy (⩽3fJ/pulse) at 180 nm node for long-term potentiation (LTP) and depression (LTD), at 180nm node for long-term potentiation (LTP) and depression (LTD), which is comparable to energy estimate in biological synapses (10 fJ). A record low learning rate (i.e., maximum ΔG<1 of G-range) is observed - which is tunable. Excellent reliability ($>10^6 endurance cycles at full conductance swing) is observed. Such a highly energy efficient synapse with tunable learning rate on the CMOS platform is a key enabler for the human-brain-scale systems. Keywords: Spiking Neural Network; Charge trap flash, SONAS, Fowler-Nordheim Tunneling, Synapse
Cite
@article{arxiv.1902.09417,
title = {Ultra-low Energy charge trap flash based synapse enabled by parasitic leakage mitigation},
author = {Shalini Shrivastava and Tanmay Chavan and Udayan Ganguly},
journal= {arXiv preprint arXiv:1902.09417},
year = {2020}
}