English

MCFlash: Bulk Bitwise Processing in 3D NAND with Dynamic Sensing and Multi-level Encoding

Hardware Architecture 2026-05-07 v1

Abstract

This paper presents MCFlash, a practical and immediately deployable technique for executing bulk bitwise operations directly within commercial off-the-shelf(COTS) 3D NAND flash chips. MCFlash relies solely on standard user-mode instructions, combining Multi-Level Cell (MLC) data encodings with dynamically tuned read reference voltages to execute in-place bitwise operations. We evaluate MCFlash across diverse NAND flash chips, both floating-gate and charge-trap variants, from different generations. Our results represent the first demonstration of error-free, on-chip bitwise operations, sustaining over one billion operations on fresh blocks and maintaining bit-error rates below 0.015% even after 10,000 program/erase (P/E) cycles.

Cite

@article{arxiv.2605.05119,
  title  = {MCFlash: Bulk Bitwise Processing in 3D NAND with Dynamic Sensing and Multi-level Encoding},
  author = {Habib Ur Rahman and Tharini Suresh and Sudeep Pasricha and Biswajit Ray},
  journal= {arXiv preprint arXiv:2605.05119},
  year   = {2026}
}

Comments

27 pages, 10 figures, preprint under review

R2 v1 2026-07-01T12:53:11.139Z