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Loop Control Management in Tightly Coupled Processor Arrays (TCPAs)

Hardware Architecture 2026-03-31 v1

Abstract

Multidimensional loop kernels often suffer from control overhead that can dominate execution time on parallel loop accelerators. Tightly Coupled Processor Arrays (TCPAs) offload loop control to a global controller (GC), but existing approaches still require hundreds of control signals. We propose a method to derive and aggressively reduce these control conditions from a polyhedral representation of the iteration space, achieving reductions of 15x to 45x in control signals across several benchmarks. We introduce a lightweight GC architecture that evaluates conditions as unions of polyhedra using bounded evaluation units, requiring hardware comparable to a single processing element. Control signals are distributed throughout the array with a minimal number of delay elements resulting in zero-overhead loop control. Our evaluation on PolyBench kernels shows that the entire control flow requires < 10 % of the total array resources.

Keywords

Cite

@article{arxiv.2603.28645,
  title  = {Loop Control Management in Tightly Coupled Processor Arrays (TCPAs)},
  author = {Dominik Walter and Frank Hannig and Jürgen Teich},
  journal= {arXiv preprint arXiv:2603.28645},
  year   = {2026}
}
R2 v1 2026-07-01T11:44:25.265Z