Probabilistic bits (p-bits) have recently been employed in neural networks (NNs) as stochastic neurons with sigmoidal probabilistic activation functions. Nonetheless, there remain a wealth of other probabilistic activation functions that are yet to be explored. Here we re-engineer the p-bit by decoupling its stochastic signal path from its input data path, giving rise to a modular p-bit that enables the realization of probabilistic neurons (p-neurons) with a range of configurable probabilistic activation functions, including a probabilistic version of the widely used Logistic Sigmoid, Tanh and Rectified Linear Unit (ReLU) activation functions. We present spintronic (CMOS + sMTJ) designs that show wide and tunable probabilistic ranges of operation. Finally, we experimentally implement digital-CMOS versions on an FPGA, with stochastic unit sharing, and demonstrate an order of magnitude (10x) saving in required hardware resources compared to conventional digital p-bit implementations.
Cite
@article{arxiv.2601.18943,
title = {Configurable p-Neurons Using Modular p-Bits},
author = {Saleh Bunaiyan and Mohammad Alsharif and Abdelrahman S. Abdelrahman and Hesham ElSawy and Suraj S. Cheema and Suhaib A. Fahmy and Kerem Y. Camsari and Feras Al-Dirini},
journal= {arXiv preprint arXiv:2601.18943},
year = {2026}
}
Comments
Accepted for presentation at IEEE ISCAS 2026 as a lecture