ALIGN ("Analog Layout, Intelligently Generated from Netlists") is an open-source automatic layout generation flow for analog circuits. ALIGN translates an input SPICE netlist to an output GDSII layout, specific to a given technology, as specified by a set of design rules. The flow first automatically detects hierarchies in the circuit netlist and translates layout synthesis to a problem of hierarchical block assembly. At the lowest level, parameterized cells are generated using an abstraction of the design rules; these blocks are then assembled under geometric and electrical constraints to build the circuit layout. ALIGN has been applied to generate layouts for a diverse set of analog circuit families: low frequency analog blocks, wireline circuits, wireless circuits, and power delivery circuits.
Cite
@article{arxiv.2008.10682,
title = {ALIGN: A System for Automating Analog Layout},
author = {Tonmoy Dhar and Kishor Kunal and Yaguang Li and Meghna Madhusudan and Jitesh Poojary and Arvind K. Sharma and Wenbin Xu and Steven M. Burns and Ramesh Harjani and Jiang Hu and Desmond A. Kirkpatrick and Parijat Mukherjee and Sachin S. Sapatnekar and Soner Yaldiz},
journal= {arXiv preprint arXiv:2008.10682},
year = {2026}
}