Current methods for converting circuit schematic images into machine-readable netlists struggle with component recognition and connectivity inference. In this paper, we present SINA, an open-source, fully automated circuit schematic image-to-netlist generator. SINA integrates deep learning for accurate component detection, Connected-Component Labeling (CCL) for precise connectivity extraction, and Optical Character Recognition (OCR) for component reference designator retrieval, while employing a Vision-Language Model (VLM) for reliable reference designator assignments. In our experiments, SINA achieves 96.47% overall netlist-generation accuracy, which is 2.72x higher than state-of-the-art approaches.
Cite
@article{arxiv.2601.22114,
title = {SINA: A Circuit Schematic Image-to-Netlist Generator Using Artificial Intelligence},
author = {Saoud Aldowaish and Yashwanth Karumanchi and Kai-Chen Chiang and Soroosh Noorzad and Morteza Fayazi},
journal= {arXiv preprint arXiv:2601.22114},
year = {2026}
}