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Emerging deep neural network (DNN) applications require high-performance multi-core hardware acceleration with large data bursts. Classical network-on-chips (NoCs) use serial packet-based protocols suffering from significant protocol…

In this work, we first characterize the hybrid execution patterns of GCNs on Intel Xeon CPU. Guided by the characterization, we design a GCN accelerator, HyGCN, using a hybrid architecture to efficiently perform GCNs. Specifically, first,…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-01-09 Mingyu Yan , Lei Deng , Xing Hu , Ling Liang , Yujing Feng , Xiaochun Ye , Zhimin Zhang , Dongrui Fan , Yuan Xie

Large deep learning models have demonstrated strong ability to solve many tasks across a wide range of applications. Those large models typically require training and inference to be distributed. Tensor parallelism is a common technique…

Ternary Neural Networks (TNNs) have received much attention due to being potentially orders of magnitude faster in inference, as well as more power efficient, than full-precision counterparts. However, 2 bits are required to encode the…

Machine Learning · Computer Science 2021-07-30 Peng Chen , Bohan Zhuang , Chunhua Shen

Deep neural networks (DNN) have shown superior performance in a variety of tasks. As they rapidly evolve, their escalating computation and memory demands make it challenging to deploy them on resource-constrained edge devices. Though…

Machine Learning · Computer Science 2021-09-07 Jiaqi Gu , Hanqing Zhu , Chenghao Feng , Mingjie Liu , Zixuan Jiang , Ray T. Chen , David Z. Pan

Recurrent Neural Network (RNN) has been widely applied for sequence modeling. In RNN, the hidden states at current step are full connected to those at previous step, thus the influence from less related features at previous step may…

Computation and Language · Computer Science 2017-05-04 Danhao Zhu , Si Shen , Xin-Yu Dai , Jiajun Chen

This paper is a slightly modified and reduced version of the proposal of the {\bf apeNEXT} project, which was submitted to DESY and INFN in spring 2000. .It presents the basic motivations and ideas of a next generation lattice QCD (LQCD)…

High Energy Physics - Lattice · Physics 2012-08-27 The APE Collaboration

The optimization of the transpose convolution layer for deep learning applications is achieved with the kernel segregation mechanism. However, kernel segregation has disadvantages, such as computing extra elements to obtain the output…

Machine Learning · Computer Science 2025-03-03 Vijay Srinivas Tida , Md Imran Hossen , Liqun Shan , Sai Venkatesh Chilukoti , Sonya Hsu , Xiali Hei

As Convolutional Neural Networks (CNNs) gain prominence in deep learning, algorithms like Winograd Convolution have been introduced to enhance computational efficiency. However, existing implementations often face challenges such as high…

Performance · Computer Science 2024-12-30 Haoyuan Gui , Xiaoyu Zhang , Chong Zhang , Zitong Su , Huiyuan Li

Deep Neural Network (DNN) frameworks use distributed training to enable faster time to convergence and alleviate memory capacity limitations when training large models and/or using high dimension inputs. With the steady increase in datasets…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-04-20 Albert Njoroge Kahira , Truong Thao Nguyen , Leonardo Bautista Gomez , Ryousei Takano , Rosa M Badia , Mohamed Wahib

Recurrent neural networks have achieved great success in many NLP tasks. However, they have difficulty in parallelization because of the recurrent structure, so it takes much time to train RNNs. In this paper, we introduce sliced recurrent…

Computation and Language · Computer Science 2018-07-09 Zeping Yu , Gongshen Liu

With the popularity of the deep neural network (DNN), hardware accelerators are demanded for real time execution. However, lengthy design process and fast evolving DNN models make hardware evaluation hard to meet the time to market need.…

Hardware Architecture · Computer Science 2022-05-05 Chih-Chyau Yang , Tian-Sheuan Chang

We give an overview of the QPACE project, which is pursuing the development of a massively parallel, scalable supercomputer for LQCD. The machine is a three-dimensional torus of identical processing nodes, based on the PowerXCell 8i…

Reduction of training time is an important issue in many tasks like patent translation involving neural networks. Data parallelism and model parallelism are two common approaches for reducing training time using multiple graphics processing…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-09-10 Junya Ono , Masao Utiyama , Eiichiro Sumita

There has been significant recent interest in parallel graph processing due to the need to quickly analyze the large graphs available today. Many graph codes have been designed for distributed memory or external memory. However, today even…

Data Structures and Algorithms · Computer Science 2019-08-22 Laxman Dhulipala , Guy E. Blelloch , Julian Shun

Deep learning based superresolution achieves high-quality results, but its heavy computational workload, large buffer, and high external memory bandwidth inhibit its usage in mobile devices. To solve the above issues, this paper proposes a…

Hardware Architecture · Computer Science 2022-05-10 An-Jung Huang , Kai-Chieh Hsu , Tian-Sheuan Chang

In this paper, we describe the architecture and performance of the GRAPE-6 system, a massively-parallel special-purpose computer for astrophysical $N$-body simulations. GRAPE-6 is the successor of GRAPE-4, which was completed in 1995 and…

Astrophysics · Physics 2015-06-24 Junichiro Makino , Toshiyuki Fukushige , Masaki Koga , Ken Namura

Due to the highly parallelizable architecture, Transformer is faster to train than RNN-based models and popularly used in machine translation tasks. However, at inference time, each output word requires all the hidden states of the…

Computation and Language · Computer Science 2019-09-06 Chengyi Wang , Shuangzhi Wu , Shujie Liu

FPGA is appropriate for fix-point neural networks computing due to high power efficiency and configurability. However, its design must be intensively refined to achieve high performance using limited hardware resources. We present an…

Hardware Architecture · Computer Science 2022-01-03 Qingyang Yi , Heming Sun , Masahiro Fujita

Multi-GPU nodes are increasingly common in the rapidly evolving landscape of exascale supercomputers. On these systems, GPUs on the same node are connected through dedicated networks, with bandwidths up to a few terabits per second.…