Related papers: Using Multiple RISC CPUs in Parallel to Study Char…
We demonstrate on-chip quantum random number generation at high data rates using the random phases of gain-switched laser pulses. Interference of the gain-switched pulses produced by two independent semiconductor lasers is performed on a…
We investigate the performance gains from hyper-systolic implementations of n^2-loop problems on the massively parallel computer Quadrics, exploiting its 3-dimensional interprocessor connectivity. For illustration we study the communication…
Today's experimental noisy quantum processors can compete with and surpass all known algorithms on state-of-the-art supercomputers for the computational benchmark task of Random Circuit Sampling [1-5]. Additionally, a circuit-based quantum…
The computational advantage of noisy quantum computers has been demonstrated by sampling the bitstrings of quantum random circuits. An important issue is how the performance of quantum devices could be quantified in the so-called "supremacy…
Modern cosmological analyses constrain physical parameters using Markov Chain Monte Carlo (MCMC) or similar sampling techniques. Oftentimes, these techniques are computationally expensive to run and require up to thousands of CPU hours to…
In-memory computing (IMC) is an effectual solution for energy-efficient artificial intelligence applications. Analog IMC amortizes the power consumption of multiple sensing amplifiers with analog-to-digital converter (ADC), and…
The rapid development of programmable network devices and the widespread use of machine learning (ML) in networking have facilitated efficient research into intelligent data plane (IDP). Offloading ML to programmable data plane (PDP)…
Random quantum circuit sampling serves as a benchmark to demonstrate quantum computational advantage. Recent progress in classical algorithms, especially those based on tensor network methods, has significantly reduced the classical…
Recent breakthroughs in associative memories suggest that silicon memories are coming closer to human memories, especially for memristive Content Addressable Memories (CAMs) which are capable to read and write in analog values. However, the…
We present a versatile rf pulse control system that has been designed for multi-qubit quantum experiments. One instrument can be scaled to provide 32 channels of rf between 10 - 450 MHz. Synchronization can be achieved across multiple…
The past few decades have seen exponential growth in capabilities of digital electronics primarily due to the ability to scale Integrated Circuits (ICs) to smaller dimensions while attaining power and performance benefits. That scalability…
Ultra-high-Q optical resonators are being studied across a wide range of research subjects including quantum information, nonlinear optics, cavity optomechanics, and telecommunications. Here, we demonstrate a new, resonator on-a-chip with a…
With phenomenal growth of high speed and complex computing applications, the design of low power and high speed logic circuits have created tremendous interest. Conventional computing devices are based on irreversible logic and further…
A photonic quantum memory capable of simultaneously storing multiple qubits and subsequently recalling any randomly selected subset of the qubits, is essential for large-scale quantum networking and computing. Such functionality, akin to…
The advanced magnetic resonance (MR) image reconstructions such as the compressed sensing and subspace-based imaging are considered as large-scale, iterative, optimization problems. Given the large number of reconstructions required by the…
We develop a novel parallel resampling algorithm for fully parallelized particle filters, which is designed with GPUs (graphics processing units) or similar parallel computing devices in mind. With our new algorithm, a full cycle of…
The SAMpler for PICosecond time (SAMPIC) chip has been designed by a collaboration including CEA/IRFU/SEDI, Saclay and CNRS/LAL/SERDI, Orsay. It benefits from both the quick response of a time to digital converter and the versatility of a…
Upcoming many core processors are expected to employ a distributed memory architecture similar to currently available supercomputers, but parallel pattern mining algorithms amenable to the architecture are not comprehensively studied. We…
A front end ASIC has been designed to equip the {\mu}TPC prototype developed for the MIMAC project, which requires 3D reconstruction of low energy particle tracks in order to perform directional detection of galactic Dark Matter. Each ASIC…
The contribution of Resistive Plate Chamber (RPC) to muon reconstruction in CMS has been studied on a sample of muons collected in proton-proton collisions at sqrt(s) = 7 TeV at the LHC in 2011. Muon reconstruction is performed using the…