Related papers: Code Annealing and the Suppressing Effect of the C…
Cyclic liftings are proposed to lower the error floor of low-density parity-check (LDPC) codes. The liftings are designed to eliminate dominant trapping sets of the base code by removing the short cycles which form the trapping sets. We…
Assuming iterative decoding for binary erasure channels (BECs), a novel tree-based technique for upper bounding the bit error rates (BERs) of arbitrary, finite low-density parity-check (LDPC) codes is provided and the resulting bound can be…
The error floor of LDPC is revisited as an effect of dynamic message behavior in the so-called absorption sets of the code. It is shown that if the signal growth in the absorption sets is properly balanced by the growth of set-external…
We propose a new low-density parity-check code construction scheme based on 2-lifts. The proposed codes have an advantage of admitting efficient hardware implementations. With the motivation of designing codes with low error floors, we…
We propose a technique to design finite-length irregular low-density parity-check (LDPC) codes over the binary-input additive white Gaussian noise (AWGN) channel with good performance in both the waterfall and the error floor region. The…
Designing high-performance error-correcting codes at short blocklengths is critical for low-latency communication systems, where decoding is governed by finite-length and graph-structural effects rather than asymptotic properties. This…
The error floor phenomenon, associated with iterative decoders, is one of the most significant limitations to the applications of low-density parity-check (LDPC) codes. A variety of techniques from code design to decoder implementation have…
Product LDPC codes take advantage of LDPC decoding algorithms and the high minimum distance of product codes. We propose to add suitable interleavers to improve the waterfall performance of LDPC decoding. Interleaving also reduces the…
We analyze the finite-length performance of spatially coupled low-density parity-check (SC-LDPC) codes under window decoding over the binary erasure channel. In particular, we propose a refinement of the scaling law by Olmos and Urbanke for…
We give a framework for generalizing LDPC code constructions that use Transversal Designs or related structures such as mutually orthogonal Latin squares. Our construction offers a broader range of code lengths and codes rates. Similar…
We propose four finite-length scaling laws to predict the frame error rate (FER) performance of spatially-coupled low-density parity-check codes under full belief propagation (BP) decoding with a limit on the number of decoding iterations…
Stall patterns are known to cause an error floor in hard decision decoding of the OFEC code. We propose a novel stall pattern removal algorithm that lowers the error floor of state-of-the-art algorithms by an order of magnitude
For efficient modulation and error control coding, the deliberate flipping approach imposes the run-length-limited(RLL) constraint by bit error before recording. From the read side, a high coding rate limits the correcting capability of RLL…
Low-density parity-check (LDPC) codes together with belief propagation (BP) decoding yield exceptional error correction capabilities in the large block length regime. Yet, there remains a gap between BP decoding and maximum likelihood…
Low-density parity-check (LDPC) codes are capable of achieving excellent performance and provide a useful alternative for high performance applications. However, at medium to high signal-to-noise ratios (SNR), an observable error floor…
The design of low-density parity-check (LDPC) code ensembles optimized for a finite number of decoder iterations is investigated. Our approach employs EXIT chart analysis and differential evolution to design such ensembles for the binary…
We propose a systematic design of protograph-based quasi-cyclic (QC) low-density parity-check (LDPC) codes with low error floor. We first characterize the trapping sets of such codes and demonstrate that the QC structure of the code…
Spinal codes is a new family of capacity-achieving rateless codes that has been shown to achieve better rate performance compared to Raptor codes, Strider codes, and rateless Low-Density Parity-Check (LDPC) codes. This correspondence…
This paper presents an efficient algorithm for finding the dominant trapping sets of a low-density parity-check (LDPC) code. The algorithm can be used to estimate the error floor of LDPC codes or to be part of the apparatus to design LDPC…
We address the error floor problem of low-density parity check (LDPC) codes on the binary-input additive white Gaussian noise (AWGN) channel, by constructing a serially concatenated code consisting of two systematic irregular repeat…