Related papers: Silicon Nanowires, Catalytic Growth and Electrical…

Solution processed field-effect transistors based on single crystalline silicon nanowires (Si NWs) with metal Schottky contacts are demonstrated. The semiconducting layer was deposited from a nanowire ink formulation at room temperature.…

We report here the first realization of top-down silicon nanowires (SiNW) transduced by both junction-less field effect transistor (FET) and the piezoresistive (PZR) effect. The suspended SiNWs are among the smallest top-down SiNWs reported…

Ultrathin InAs nanowires (NW) with one-dimensional (1D) sub-band structure are promising materials for advanced quantum-electronic devices, where dimensions in the sub-30 nm diameter limit together with post-CMOS integration scenarios on Si…

In this study, InSb nanowires have been formed by electrodeposition and integrated into NW-FETs. NWs were formed in porous anodic alumina (PAA) templates, with the PAA pore diameter of approximately 100 nm defining the NW diameter.…

Bandstructure effects in the electronic transport of strongly quantized silicon nanowire field-effect-transistors (FET) in various transport orientations are examined. A 10-band sp3d5s* semi-empirical atomistic tight-binding model coupled…

The recent development of the superlattice nanowire pattern transfer (SNAP) technique allows for the fabrication of arrays of nanowires at a diameter, pitch, aspect ratio, and regularity beyond competing approaches. Here, we report the…

The controlled growth of nanowires (NWs) with dimensions comparable to the Fermi wavelengths of the charge carriers allows fundamental investigations of quantum confinement phenomena. Here, we present studies of proximity-induced…

InAs nanowires have been actively explored as the channel material for high performance transistors owing to their high electron mobility and ease of ohmic metal contact formation. The catalytic growth of non-epitaxial InAs nanowires,…

GaAs nanowires were grown by molecular beam epitaxy on Si(100) substrates covered with 5 nm SiO2. The growth was performed with As4 at low, close to stoichiometric, As4/Ga flux ratio, using Ga nanodroplets as catalyst. The nanowires are…

InN nanowires were grown on Si<111> and Si<100> substrates by plasma-assisted molecular beam epitaxy using a thin AlN buffer layer at temperatures compatible with the thermal budget limitation imposed by Back-End-Of-Line processing.…

We report a phenomenon of strain-driven shape transition in the growth of nanoscale self-organized endotaxial CoSi2 islands on Si (100) substrates. Small square shaped islands as small as 15\times15 nm2 have been observed. Islands grow in…

A 20 band sp3d5s* spin-orbit-coupled, semi-empirical, atomistic tight-binding (TB) model is used with a semi-classical, ballistic, field-effect-transistor (FET) model, to theoretically examine the bandstructure carrier velocity and…

GaN/SiO2 core/shell nanowires are grown by cobalt phthalocyanine catalyst assisted vapor-liquid-solid route, in which Si wafer coated with a mixture of gallium and indium is used as the source for Ga and Si and ammonia is used as the…

Vapor-liquid-solid (VLS) route and its variants are routinely used for scalable synthesis of semiconducting nanowires yet the fundamental growth processes remain unknown. Here, we employ atomic-scale computations based on model potentials…

A new method of introducing nanopores with spongy morphology during fabrication of size and pitch controlled flexible silicon microwires (SiMWs) in wafer scale is presented using nanosphere lithography technique in addition to metal…

Semiconductor nanowires have been playing a crucial role in the development of nanoscale devices for the realization of spin qubits, Majorana fermions, single photon emitters, nanoprocessors, etc. The monolithic growth of site-controlled…

Self-assembled Ge wires with a height of only 3 unit cells and a length of up to 2 micrometers were grown on Si(001) by means of a catalyst-free method based on molecular beam epitaxy. The wires grow horizontally along either the [100] or…

The atomic and electronic structure of a set of proposed thin (1.6 nm in diameter) silicon/silica quantum nanodots and nanowires with narrow interface, as well as parent metastable silicon structures (1.2 nm in diameter), was studied in…

At vertical edges, thin films of silicon oxide (SiO_{2-x}) contain semiconductive c-Si layered nanocrystals (Si NC) embedded in and supported by an insulating g-SiO2 matrix. Tour et al. have shown that a trenched thin film geometry enables…

A procedure to achieve the density-controlled growth of gold-catalyzed InP nanowires (NWs) on (111) silicon substrates using the vapor-liquid-solid method by molecular beam epitaxy is reported. We develop an effective and mask-free method…