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Recurrent neural networks (RNNs) are becoming the de facto solution for speech recognition. RNNs exploit long-term temporal relationships in data by applying repeated, learned transformations. Unlike fully-connected (FC) layers with single…

Signal Processing · Electrical Eng. & Systems 2019-08-27 Udit Gupta , Brandon Reagen , Lillian Pentecost , Marco Donato , Thierry Tambe , Alexander M. Rush , Gu-Yeon Wei , David Brooks

With Von-Neumann computing architectures struggling to address computationally- and memory-intensive big data analytic task today, Processing-in-Memory (PIM) platforms are gaining growing interests. In this way, processing-in-DRAM…

Hardware Architecture · Computer Science 2019-04-12 Shaahin Angizi , Deliang Fan

Dedicated accelerators are being designed to address the huge resource requirement of the deep neural network (DNN) applications. The power, performance and area (PPA) constraints limit the number of MACs available in these accelerators.…

Hardware Architecture · Computer Science 2021-02-25 Mahesh Chandra

Digital In-memory computing improves energy efficiency and throughput of a data-intensive process, which incur memory thrashing and, resulting multiple same memory accesses in a von Neumann architecture. Digital in-memory computing involves…

Hardware Architecture · Computer Science 2021-08-11 Veerendra S Devaraddi , Joycee M. Mekie

The human brain simultaneously optimizes synaptic weights and topology by growing, pruning, and strengthening synapses while performing all computation entirely in memory. In contrast, modern artificial-intelligence systems separate weight…

Hardware Architecture · Computer Science 2025-06-17 Songqi Wang , Yue Zhang , Jia Chen , Xinyuan Zhang , Yi Li , Ning Lin , Yangu He , Jichang Yang , Yingjie Yu , Yi Li , Zhongrui Wang , Xiaojuan Qi , Han Wang

Specialized accelerators have recently garnered attention as a method to reduce the power consumption of neural network inference. A promising category of accelerators utilizes nonvolatile memory arrays to both store weights and perform…

Deep learning algorithms have shown tremendous success in many recognition tasks; however, these algorithms typically include a deep neural network (DNN) structure and a large number of parameters, which makes it challenging to implement…

Neural and Evolutionary Computing · Computer Science 2018-04-23 Shihui Yin , Gaurav Srivastava , Shreyas K. Venkataramanaiah , Chaitali Chakrabarti , Visar Berisha , Jae-sun Seo

A 28nm dense 6T-SRAM Digital(D)/Analog(A) Hybrid compute-in-memory (CIM) macro supporting complex num-ber MAC operation is presented. By introducing a 2D-weighted Capacitor Array, a hybrid configuration is adopted where digital CIM is…

Hardware Architecture · Computer Science 2025-08-26 Shota Konno , Che-Kai Liu , Sigang Ryu , Samuel Spetalnick , Arijit Raychowdhury

Recently, the demand of low-power deep-learning hardware for industrial applications has been increasing. Most existing artificial intelligence (AI) chips have evolved to rely on new chip technologies rather than on radically new hardware…

Machine Learning · Computer Science 2020-02-14 Byungik Ahn

State-of-the-art in-memory computation has recently emerged as the most promising solution to overcome design challenges related to data movement inside current computing systems. One of the approaches to performing in-memory computation is…

Hardware Architecture · Computer Science 2022-09-13 Saeed Seyedfaraji , Baset Mesgari , Semeen Rehman

Recently, crossbar array based in-memory accelerators have been gaining interest due to their high throughput and energy efficiency. While software and compiler support for the in-memory accelerators has also been introduced, they are…

Hardware Architecture · Computer Science 2025-01-14 Jihoon Park , Jeongin Choe , Dohyun Kim , Jae-Joon Kim

The paper presents a systematic study and implementation of a reconfigurable combinatorial multi-operand adder for use in Deep Learning systems. The size of carry changes with the number of operands and hence a reliable algorithm to…

Hardware Architecture · Computer Science 2020-08-10 Shilpa Mayannavar , Uday Wali

Neural-network (NN) inference is increasingly present on-board spacecraft to reduce downlink bandwidth and enable timely decision making. However, the power and reliability constraints of space missions limit the applicability of many…

Hardware Architecture · Computer Science 2026-03-17 Pedro Antunes , Artur Podobas

Recent research demonstrated the promise of using resistive random access memory (ReRAM) as an emerging technology to perform inherently parallel analog domain in-situ matrix-vector multiplication -- the intensive and key computation in…

3D point cloud neural networks have significantly enhanced the perceptual capabilities of resource-limited mobile intelligent systems. However, despite the transformative impact, the point cloud algorithm suffers from substantial memory…

Hardware Architecture · Computer Science 2026-03-24 Dengfeng Wang , Shunqin Cai , Yanan Sun

As deep learning models continue to increase in size, the memory requirements for training have surged. While high-level techniques like offloading, recomputation, and compression can alleviate memory pressure, they also introduce…

Machine Learning · Computer Science 2023-10-31 Huiyao Shu , Ang Wang , Ziji Shi , Hanyu Zhao , Yong Li , Lu Lu

Neural Radiance Fields (NeRF) offer significant promise for generating photorealistic images and videos. However, existing mainstream neural rendering models often fall short in meeting the demands for immediacy and power efficiency in…

Hardware Architecture · Computer Science 2025-08-05 Fangxin Liu , Haomin Li , Bowen Zhu , Zongwu Wang , Zhuoran Song , Habing Guan , Li Jiang

Compute-in-memory (CIM) has shown significant potential in efficiently accelerating deep neural networks (DNNs) at the edge, particularly in speeding up quantized models for inference applications. Recently, there has been growing interest…

Hardware Architecture · Computer Science 2025-02-12 Zhiqiang Yi , Yiwen Liang , Weidong Cao

Edge computing must be capable of executing computationally intensive algorithms, such as Deep Neural Networks (DNNs) while operating within a constrained computational resource budget. Such computations involve Matrix Vector…

Hardware Architecture · Computer Science 2023-10-24 Arani Roy , Kaushik Roy

With the increase in the computation intensity of the chip, the mismatch between computation layer shapes and the available computation resource significantly limits the utilization of the chip. Driven by this observation, prior works…

Hardware Architecture · Computer Science 2024-02-20 Jinming Zhuang , Zhuoping Yang , Shixin Ji , Heng Huang , Alex K. Jones , Jingtong Hu , Yiyu Shi , Peipei Zhou
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