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Analog compute-in-memory (CIM) in static random-access memory (SRAM) is promising for accelerating deep learning inference by circumventing the memory wall and exploiting ultra-efficient analog low-precision arithmetic. Latest analog CIM…

Hardware Architecture · Computer Science 2024-07-19 Zhiyu Chen , Ziyuan Wen , Weier Wan , Akhil Reddy Pakala , Yiwei Zou , Wei-Chen Wei , Zengyi Li , Yubei Chen , Kaiyuan Yang

We propose a new digital-to-analog converter (DAC) for realizing a synapse circuit of mixed-signal spiking neural networks. We named this circuit "time-domain DAC (TDAC)". This produces weights for converting a digital input code into…

Signal Processing · Electrical Eng. & Systems 2020-01-22 Seiji Uenohara , Kazuyuki Aihara

Nowadays, we are witnessing an Artificial Intelligence revolution that dominates the technology landscape in various application domains, such as healthcare, robotics, automotive, security, and defense. Massive-scale AI models, which mimic…

Hardware Architecture · Computer Science 2026-04-23 Shady Agwa , Yikang Shen , Shiwei Wang , Themis Prodromakis

State-of-the-art in-memory computation has recently emerged as the most promising solution to overcome design challenges related to data movement inside current computing systems. One of the approaches to performing in-memory computation is…

Hardware Architecture · Computer Science 2022-09-13 Saeed Seyedfaraji , Baset Mesgari , Semeen Rehman

Deep learning hardware designs have been bottlenecked by conventional memories such as SRAM due to density, leakage and parallel computing challenges. Resistive devices can address the density and volatility issues, but have been limited by…

Emerging Technologies · Computer Science 2020-10-28 Shihui Yin , Xiaoyu Sun , Shimeng Yu , Jae-sun Seo

Analog processing-using-memory (PUM; a.k.a. in-memory computing) makes use of electrical interactions inside memory arrays to perform bulk matrix-vector multiplication (MVM) operations. However, many popular matrix-based kernels need to…

Hardware Architecture · Computer Science 2026-05-06 Ryan Wong , Ben Feinberg , Saugata Ghose

Processing-in-memory (PIM) has emerged as the go to solution for addressing the von Neumann bottleneck in edge AI accelerators. However, state-of-the-art (SoTA) digital PIM approaches suffer from low compute density, primarily due to the…

Hardware Architecture · Computer Science 2025-10-23 Mukul Lokhande , Narendra Singh Dhakad , Seema Chouhan , Akash Sankhe , Santosh Kumar Vishvakarma

Reduced-precision and variable-precision multiply-accumulate (MAC) operations provide opportunities to significantly improve energy efficiency and throughput of DNN accelerators with no/limited algorithmic performance loss, paving a way…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-01-20 Ehab M. Ibrahim , Linyan Mei , Marian Verhelst

DNNs are widely used but face significant computational costs due to matrix multiplications, especially from data movement between the memory and processing units. One promising approach is therefore Processing-in-Memory as it greatly…

Hardware Architecture · Computer Science 2024-01-19 Lorenzo Sonnino , Shaswot Shresthamali , Yuan He , Masaaki Kondo

Analog in-memory computing (AIMC) is an energy-efficient alternative to digital architectures for accelerating machine learning and signal processing workloads. However, its energy efficiency is limited by the high energy cost of the column…

Signal Processing · Electrical Eng. & Systems 2025-07-16 Mihir Kavishwar , Naresh Shanbhag

Edge computing must be capable of executing computationally intensive algorithms, such as Deep Neural Networks (DNNs) while operating within a constrained computational resource budget. Such computations involve Matrix Vector…

Hardware Architecture · Computer Science 2023-10-24 Arani Roy , Kaushik Roy

AI chips commonly employ SRAM memory as buffers for their reliability and speed, which contribute to high performance. However, SRAM is expensive and demands significant area and energy consumption. Previous studies have explored replacing…

Hardware Architecture · Computer Science 2023-12-07 Duy-Thanh Nguyen , Abhiroop Bhattacharjee , Abhishek Moitra , Priyadarshini Panda

The Dadda algorithm is a parallel structured multiplier, which is quite faster as compared to array multipliers, i.e., Booth, Braun, Baugh-Wooley, etc. However, it consumes more power and needs a larger number of gates for hardware…

Systems and Control · Electrical Eng. & Systems 2023-07-13 Muteen Munawar , Zain Shabbir , Muhammad Akram

The demand for computation resources and energy efficiency of Convolutional Neural Networks (CNN) applications requires a new paradigm to overcome the "Memory Wall". Analog In-Memory Computing (AIMC) is a promising paradigm since it…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-11-24 Nazareno Bruschi , Giuseppe Tagliavini , Angelo Garofalo , Francesco Conti , Irem Boybat , Luca Benini , Davide Rossi

Edge computing is a promising solution for handling high-dimensional, multispectral analog data from sensors and IoT devices for applications such as autonomous drones. However, edge devices' limited storage and computing resources make it…

Machine Learning · Computer Science 2023-09-21 Nastaran Darabi , Amit R. Trivedi

Memory-centric computing aims to enable computation capability in and near all places where data is generated and stored. As such, it can greatly reduce the large negative performance and energy impact of data access and data movement, by…

Hardware Architecture · Computer Science 2023-09-15 Onur Mutlu

Processing in memory (PIM) moves computation into memories with the goal of improving throughput and energy-efficiency compared to traditional von Neumann-based architectures. Most existing PIM architectures are either general-purpose but…

Hardware Architecture · Computer Science 2019-07-23 Oscar Castañeda , Maria Bobbett , Alexandra Gallyas-Sanhueza , Christoph Studer

Recent works propose neural network- (NN-) inspired analog-to-digital converters (NNADCs) and demonstrate their great potentials in many emerging applications. These NNADCs often rely on resistive random-access memory (RRAM) devices to…

Machine Learning · Computer Science 2019-12-02 Weidong Cao , Liu Ke , Ayan Chakrabarti , Xuan Zhang

Analog Content Addressable Memories (aCAMs) have proven useful for associative in-memory computing applications like Decision Trees, Finite State Machines, and Hyper-dimensional Computing. While non-volatile implementations using FeFETs and…

Emerging Technologies · Computer Science 2024-10-15 Paul-Philipp Manea , Nathan Leroux , Emre Neftci , John Paul Strachan

As SRAM-based caches are hitting a scaling wall, manufacturers are integrating DRAM-based caches into system designs to continue increasing cache sizes. While DRAM caches can improve the performance of memory systems, existing DRAM cache…