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Related papers: Stencil Computations on Tenstorrent Wormhole

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Recent hardware acceleration advances have enabled powerful specialized accelerators for finite element computations, spiking neural network inference, and sparse tensor operations. However, existing approaches face fundamental limitations:…

Hardware Architecture · Computer Science 2026-01-09 Chuanzhen Wang , Leo Zhang , Eric Liu

The integration of spiking neural networks (SNNs) with transformer-based architectures has opened new opportunities for bio-inspired low-power, event-driven visual reasoning on edge devices. However, the high temporal resolution and binary…

Hardware Architecture · Computer Science 2025-11-11 Tamoghno Das , Khanh Phan Vu , Hanning Chen , Hyunwoo Oh , Mohsen Imani

Deep learning implementations on CPUs (Central Processing Units) are gaining more traction. Enhanced AI capabilities on commodity x86 architectures are commercially appealing due to the reuse of existing hardware and virtualization ease. A…

Machine Learning · Computer Science 2021-03-22 Shabnam Daghaghi , Nicholas Meisburger , Mengnan Zhao , Yong Wu , Sameh Gobriel , Charlie Tai , Anshumali Shrivastava

A major computational bottleneck in modern High Energy Physics event generators arises from the integration of the matrix element, which requires repeated evaluations at different phase-space points to cover all possible initial- and…

AMD GPUs offer state-of-the-art compute and memory bandwidth; however, peak performance AMD kernels are written in raw assembly. To address the difficulty of mapping AI algorithms to hardware, recent work proposes C++ embedded and…

Dense matrix multiply (MM) serves as one of the most heavily used kernels in deep learning applications. To cope with the high computation demands of these applications, heterogeneous architectures featuring both FPGA and dedicated ASIC…

In today's era of rapid technological advancement, artificial intelligence (AI) applications require large-scale, high-performance, and data-intensive computations, leading to significant energy demands. Addressing this challenge…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-04-08 Giulio Malenza , Francesco Targa , Adriano Marques Garcia , Marco Aldinucci , Robert Birke

The huge demand for computation in artificial intelligence (AI) is driving unparalleled investments in hardware and software systems for AI. This leads to an explosion in the number of specialized hardware devices, which are now offered by…

Large language models (LLMs) have transformed artificial intelligence, but their computational requirements remain prohibitive for most users. Standard inference demands expensive datacenter GPUs or cloud API access, leaving over one…

Computation and Language · Computer Science 2026-05-08 Nii Osae Osae Dade , Tony Morri , Moinul Hossain Rahat , Sayandip Pal

We advocate the Loop-of-stencil-reduce pattern as a means of simplifying the implementation of data-parallel programs on heterogeneous multi-core platforms. Loop-of-stencil-reduce is general enough to subsume map, reduce, map-reduce,…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-09-16 M. Aldinucci , M. Danelutto , M. Drocco , P. Kilpatrick , C. Misale , G. Peretti Pezzi , M. Torquati

Computation intensive kernels, such as convolutions, matrix multiplication and Fourier transform, are fundamental to edge-computing AI, signal processing and cryptographic applications. Interleaved-Multi-Threading (IMT) processor cores are…

Hardware Architecture · Computer Science 2021-02-09 Abdallah Cheikh , Stefano Sordillo , Antonio Mastrandrea , Francesco Menichelli , Giuseppe Scotti , Mauro Olivieri

Chiplet architectures are on the rise as they promise to overcome the scaling challenges of monolithic chips. A key component of such architectures is an efficient inter-chiplet interconnect (ICI). The ICI design space is huge as there are…

Hardware Architecture · Computer Science 2025-03-19 Patrick Iff , Benigna Bruggmann , Blaise Morel , Maciej Besta , Luca Benini , Torsten Hoefler

We present an efficient approach for writing architecture-agnostic parallel high-performance stencil computations in Julia, which is instantiated in the package ParallelStencil.jl. Powerful metaprogramming, costless abstractions and…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-12-01 Samuel Omlin , Ludovic Räss

Modern general-purpose accelerators integrate a large number of programmable area- and energy-efficient processing elements (PEs), to deliver high performance while meeting stringent power delivery and thermal dissipation constraints. In…

Hardware Architecture · Computer Science 2025-11-11 Luca Colagrande , Jayanth Jonnalagadda , Luca Benini

Token generation speed is critical to power the next wave of AI inference applications. GPUs significantly underperform during token generation due to synchronization overheads at kernel boundaries, utilizing only 21% of their peak memory…

The growing demand for efficient, high-performance processing in machine learning (ML) and image processing has made hardware accelerators, such as GPUs and Data Streaming Accelerators (DSAs), increasingly essential. These accelerators…

Hardware Architecture · Computer Science 2025-04-17 Qunyou Liu , Marina Zapater , David Atienza

The importance of stencil-based algorithms in computational science has focused attention on optimized parallel implementations for multilevel cache-based processors. Temporal blocking schemes leverage the large bandwidth and low latency of…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-07-28 Tareq Malas , Georg Hager , Hatem Ltaief , Holger Stengel , Gerhard Wellein , David Keyes

Ongoing climate change calls for fast and accurate weather and climate modeling. However, when solving large-scale weather prediction simulations, state-of-the-art CPU and GPU implementations suffer from limited performance and high energy…

We evolve PyDTNN, a framework for distributed parallel training of Deep Neural Networks (DNNs), into an efficient inference tool for convolutional neural networks. Our optimization process on multicore ARM processors involves several…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-05-20 Adrián Castelló , Sergio Barrachina , Manuel F. Dolz , Enrique S. Quintana-Ortí , Pau San Juan

In this paper we revisit stencil methods on GPUs in the context of exponential integrators. We further discuss boundary conditions, in the same context, and show that simple boundary conditions (for example, homogeneous Dirichlet or…

Numerical Analysis · Computer Science 2014-05-27 Lukas Einkemmer , Alexander Ostermann
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