English

Klessydra-T: Designing Vector Coprocessors for Multi-Threaded Edge-Computing Cores

Hardware Architecture 2021-02-09 v2

Abstract

Computation intensive kernels, such as convolutions, matrix multiplication and Fourier transform, are fundamental to edge-computing AI, signal processing and cryptographic applications. Interleaved-Multi-Threading (IMT) processor cores are interesting to pursue energy efficiency and low hardware cost for edge-computing, yet they need hardware acceleration schemes to run heavy computational workloads. Following a vector approach to accelerate computations, this study explores possible alternatives to implement vector coprocessing units in RISC-V cores, showing the synergy between IMT and data-level parallelism in the target workloads.

Keywords

Cite

@article{arxiv.2007.09109,
  title  = {Klessydra-T: Designing Vector Coprocessors for Multi-Threaded Edge-Computing Cores},
  author = {Abdallah Cheikh and Stefano Sordillo and Antonio Mastrandrea and Francesco Menichelli and Giuseppe Scotti and Mauro Olivieri},
  journal= {arXiv preprint arXiv:2007.09109},
  year   = {2021}
}

Comments

Final revision accepted for publication on IEEE Micro Journal

R2 v1 2026-06-23T17:12:09.324Z