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In the hardware design space exploration process, it is critical to optimize both hardware parameters and algorithm-to-hardware mappings. Previous work has largely approached this simultaneous optimization problem by separately exploring…

Hardware Architecture · Computer Science 2025-09-16 Charles Hong , Qijing Huang , Grace Dinh , Mahesh Subedar , Yakun Sophia Shao

Problem Statement: Field Programmable Gate Array (FPGA) circuits play a significant role in major recent embedded process control designs. However, exploiting these platforms requires deep hardware conception skills and remains an important…

Systems and Control · Computer Science 2013-12-20 Ahmed Ben Achballah , Slim Ben Othman , Slim Ben Saoud

Designing hardware is a time-consuming and complex process. Realization of both, embedded and high-performance applications can benefit from a design process on a higher level of abstraction. This helps to reduce development time and allows…

Software Engineering · Computer Science 2015-09-01 Franz Richter-Gottfried , Alexander Ditter , Dietmar Fey

In this paper, we present a novel technique to search for hardware architectures of accelerators optimized for end-to-end training of deep neural networks (DNNs). Our approach addresses both single-device and distributed pipeline and tensor…

Hardware Architecture · Computer Science 2024-04-24 Muhammad Adnan , Amar Phanishayee , Janardhan Kulkarni , Prashant J. Nair , Divya Mahajan

Modern chip physical design relies heavily on Electronic Design Automation (EDA) tools, which often struggle to provide interpretable feedback or actionable guidance for improving routing congestion. In this work, we introduce a Multimodal…

Hardware Architecture · Computer Science 2025-10-21 Yun-Da Tsai , Chang-Yu Chao , Liang-Yeh Shen , Tsung-Han Lin , Haoyu Yang , Mark Ho , Yi-Chen Lu , Wen-Hao Liu , Shou-De Lin , Haoxing Ren

In recent years, deep learning has become more and more mature, and as a commonly used algorithm in deep learning, convolutional neural networks have been widely used in various visual tasks. In the past, research based on deep learning…

Artificial Intelligence · Computer Science 2020-12-24 Simin Liu

Field-programmable gate arrays (FPGAs) provide an opportunity to co-design applications with hardware accelerators, yet they remain difficult to program. High-level synthesis (HLS) tools promise to raise the level of abstraction by…

Programming Languages · Computer Science 2021-11-17 Rachit Nigam , Sachille Atapattu , Samuel Thomas , Zhijing Li , Theodore Bauer , Yuwei Ye , Apurva Koti , Adrian Sampson , Zhiru Zhang

Field-programmable gate array (FPGA) based accelerators are being widely used for acceleration of convolutional neural networks (CNNs) due to their potential in improving the performance and reconfigurability for specific application…

Image and Video Processing · Electrical Eng. & Systems 2020-02-04 Martin Ferianc , Hongxiang Fan , Ringo S. W. Chu , Jakub Stano , Wayne Luk

In order for FPGAs to be successful outside traditional markets, tools which enable software programmers to achieve high levels of system performance while abstracting away the FPGA-specific details are needed. DSPB Builder Advanced (DSPBA)…

Other Computer Science · Computer Science 2014-08-22 Adrian J. Chung , Kathryn Cobden , Mark Jervis , Martin Langhammer , Bogdan Pasca

With the increasing demand for computing capability given limited resource and power budgets, it is crucial to deploy applications to customized accelerators like FPGAs. However, FPGA programming is non-trivial. Although existing high-level…

Hardware Architecture · Computer Science 2024-01-11 Weichuang Zhang , Jieru Zhao , Guan Shen , Quan Chen , Chen Chen , Minyi Guo

Simulation-based design space exploration (DSE) aims to efficiently optimize high-dimensional structured designs under complex constraints and expensive evaluation costs. Existing approaches, including heuristic and multi-step reinforcement…

Machine Learning · Computer Science 2025-06-05 Yifeng Xiao , Yurong Xu , Ning Yan , Masood Mortazavi , Pierluigi Nuzzo

Driven by Moore's Law, the complexity and scale of modern chip design are increasing rapidly. Electronic Design Automation (EDA) has been widely applied to address the challenges encountered in the full chip design process. However, the…

Hardware Architecture · Computer Science 2024-01-24 Ruizhe Zhong , Xingbo Du , Shixiong Kai , Zhentao Tang , Siyuan Xu , Hui-Ling Zhen , Jianye Hao , Qiang Xu , Mingxuan Yuan , Junchi Yan

Field-Programmable Gate Arrays (FPGAs) have provided Thomas Jefferson National Accelerator Facility (Jefferson Lab) with versatile VME-based data acquisition and control interfaces with minimal development times. FPGA designs have been used…

Hardware Architecture · Computer Science 2014-11-17 T. Allison , R. Flood

Many modern embedded systems have end-to-end (EtoE) latency constraints that necessitate precise timing to ensure high reliability and functional correctness. The combination of High-Level Synthesis (HLS) and Design Space Exploration (DSE)…

Hardware Architecture · Computer Science 2024-09-26 Yuchao Liao , Tosiron Adegbija , Roman Lysecky

The integration of Large Language Models (LLMs) into Electronic Design Automation (EDA) and hardware security is rapidly reshaping the semiconductor industry. While LLMs offer unprecedented capabilities in generating Register Transfer Level…

Cryptography and Security · Computer Science 2026-05-21 Johann Knechtel , Ozgur Sinanoglu , Ramesh Karri

As the emerging field of machine learning, deep learning shows excellent ability in solving complex learning problems. However, the size of the networks becomes increasingly large scale due to the demands of the practical applications,…

Machine Learning · Computer Science 2016-05-24 Chao Wang , Qi Yu , Lei Gong , Xi Li , Yuan Xie , Xuehai Zhou

FPGA-based heterogeneous architectures provide programmers with the ability to customize their hardware accelerators for flexible acceleration of many workloads. Nonetheless, such advantages come at the cost of sacrificing programmability.…

Hardware Architecture · Computer Science 2018-07-05 Jason Cong , Zhenman Fang , Yuchen Hao , Peng Wei , Cody Hao Yu , Chen Zhang , Peipei Zhou

The high efficiency of domain-specific hardware accelerators for machine learning (ML) has come from specialization, with the trade-off of less configurability/ flexibility. There is growing interest in developing flexible ML accelerators…

Hardware Architecture · Computer Science 2022-06-08 Sheng-Chun Kao , Hyoukjun Kwon , Michael Pellauer , Angshuman Parashar , Tushar Krishna

Event-based vision represents a paradigm shift in how vision information is captured and processed. By only responding to dynamic intensity changes in the scene, event-based sensing produces far less data than conventional frame-based…

Hardware Architecture · Computer Science 2024-04-09 Yizhao Gao , Baoheng Zhang , Yuhao Ding , Hayden Kwok-Hay So

Today, there is a trend to incorporate more intelligence (e.g., vision capabilities) into a wide range of devices, which makes high performance a necessity for computing systems. Furthermore, for embedded systems, low power consumption…

Other Computer Science · Computer Science 2014-08-25 Zhilei Chai , Zhibin Wang , Wenmin Yang , Shuai Ding , Yuanpu Zhang