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Advancements in AI have greatly enhanced the medical imaging process, making it quicker to diagnose patients. However, very few have investigated the optimization of a multi-model system with hardware acceleration. As specialized edge…

Hardware Architecture · Computer Science 2025-10-03 Ashiyana Abdul Majeed , Mahmoud Meribout , Safa Mohammed Sali

Edge-AI applications demand high-throughput, low-latency inference on FPGAs under tight resource and power constraints. This survey provides a comprehensive review of two key architectural decisions for FPGA-based neural network…

Hardware Architecture · Computer Science 2025-06-03 Richie Li

Optimizing Large Language Model (LLM) inference in production systems is increasingly difficult due to dynamic workloads, stringent latency/throughput targets, and a rapidly expanding configuration space. This complexity spans not only…

The proliferation of large language models (LLMs) is accelerating the integration of multimodal assistants into edge devices, where inference is executed under stringent latency and energy constraints, often exacerbated by intermittent…

Hardware Architecture · Computer Science 2026-01-29 Yanru Chen , Runyang Tian , Yue Pan , Zheyu Li , Weihong Xu , Tajana Rosing

Our objective will be to integrate ML into Fermilab accelerator operations and furthermore provide an accessible framework which can also be used by a broad range of other accelerator systems with dynamic tuning needs. We will develop of…

Federated learning (FL) over heterogeneous IoT edge devices faces coupled system-modality-data heterogeneity: the lower-cost device carries both fewer sensors and less computational power, so the slowest device (straggler) produces the most…

Networking and Internet Architecture · Computer Science 2026-04-07 Beining Wu , Zihao Ding , Jun Huang

Sparse General Matrix-Matrix Multiplication (SpGEMM) is a fundamental operation in numerous scientific computing and data analytics applications, often bottlenecked by irregular memory access patterns. This paper presents Hash based…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-16 Shiju Li , Younghoon Min , Hane Yie , Hoshik Kim , Soohong Ahn , Joonseop Sim , Chul-Ho Lee , Jongryool Kim

On-device machine learning (ML) has become a fundamental component of emerging mobile applications. Adaptive model deployment delivers efficient inference for heterogeneous device capabilities and performance requirements through…

Machine Learning · Computer Science 2025-12-01 Mengyang Liu , Chenyu Lu , Haodong Tian , Fang Dong , Ruiting Zhou , Wei Wang , Dian Shen , Guangtong Li , Ye Wan , Li Li

Modern AI workloads rely heavily on optimized computing kernels for both training and inference. These AI kernels follow well-defined data-flow patterns, such as moving tiles between DRAM and SRAM and performing a sequence of computations…

Machine Learning · Computer Science 2025-04-29 Lei Wang , Yu Cheng , Yining Shi , Zhengju Tang , Zhiwen Mo , Wenhao Xie , Lingxiao Ma , Yuqing Xia , Jilong Xue , Fan Yang , Zhi Yang

The scientific community increasingly relies on machine learning (ML) for near-sensor processing, leveraging its strengths in tasks such as pattern recognition, anomaly detection, and real-time decision-making. These deployments demand…

Hardware Architecture · Computer Science 2026-03-30 G Abarajithan , Zhenghua Ma , Ravidu Munasinghe , Francesco Restuccia , Ryan Kastner

Attention accounts for an increasingly dominant fraction of total computation during inference for mixture-of-experts (MoE) models, making efficient acceleration critical. Emerging domain-specific accelerators for large model inference are…

Hardware Architecture · Computer Science 2026-04-03 Chi Zhang , Luca Colagrande , Renzo Andri , Luca Benini

While neural network hardware accelerators provide a substantial amount of raw compute throughput, the models deployed on them must be co-designed for the underlying hardware architecture to obtain the optimal system performance. We present…

Signal Processing · Electrical Eng. & Systems 2020-03-09 Suyog Gupta , Berkin Akin

Multi-Head Attention (MHA) is a critical computational kernel in transformer-based AI models. Emerging scalable tile-based accelerator architectures integrate increasing numbers of tightly-packed processing elements (PEs) with tensor units.…

Hardware Architecture · Computer Science 2025-05-27 Chi Zhang , Luca Colagrande , Renzo Andri , Thomas Benz , Gamze Islamoglu , Alessandro Nadalini , Francesco Conti , Yawei Li , Luca Benini

Complex, high-throughput data acquisition and processing systems, such as those used in high-energy physics experiments, are increasingly moving sophisticated pattern recognition and data compression algorithms closer to the sensors…

High Energy Physics - Experiment · Physics 2026-03-17 Ioannis Xiotidis , Noah Clarke Hall , Tianjia Du , Nikos Konstantinidis , David Miller

This paper presents EasyRAG, a simple, lightweight, and efficient retrieval-augmented generation framework for automated network operations. Our framework has three advantages. The first is accurate question answering. We designed a…

Computation and Language · Computer Science 2024-10-16 Zhangchi Feng , Dongdong Kuang , Zhongyuan Wang , Zhijie Nie , Yaowei Zheng , Richong Zhang

The growing demand for edge computing and AI drives research into analog in-memory computing using memristors, which overcome data movement bottlenecks by computing directly within memory. However, device failures and variations critically…

Emerging Technologies · Computer Science 2025-07-16 Zhicheng Xu , Jiawei Liu , Sitao Huang , Zefan Li , Shengbo Wang , Bo Wen , Ruibin Mao , Mingrui Jiang , Giacomo Pedretti , Jim Ignowski , Kaibin Huang , Can Li

Deployment of modern TinyML tasks on small battery-constrained IoT devices requires high computational energy efficiency. Analog In-Memory Computing (IMC) using non-volatile memory (NVM) promises major efficiency improvements in deep neural…

Hardware Architecture · Computer Science 2022-01-05 Angelo Garofalo , Gianmarco Ottavi , Francesco Conti , Geethan Karunaratne , Irem Boybat , Luca Benini , Davide Rossi

On the path to exascale the landscape of computer device architectures and corresponding programming models has become much more diverse. While various low-level performance portable programming models are available, support at the…

Analog in-memory computing (AIMC) -- a promising approach for energy-efficient acceleration of deep learning workloads -- computes matrix-vector multiplications (MVMs) but only approximately, due to nonidealities that often are…

General matrix-matrix multiplication (GEMM) is a fundamental operation in machine learning (ML) applications. We present the first comprehensive performance acceleration of GEMM workloads on AMD's second-generation AIE-ML (AIE2)…

Hardware Architecture · Computer Science 2025-09-01 Kaustubh Mhatre , Endri Taka , Aman Arora