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Accelerator-aware Neural Network Design using AutoML

Signal Processing 2020-03-09 v1 Machine Learning Machine Learning

Abstract

While neural network hardware accelerators provide a substantial amount of raw compute throughput, the models deployed on them must be co-designed for the underlying hardware architecture to obtain the optimal system performance. We present a class of computer vision models designed using hardware-aware neural architecture search and customized to run on the Edge TPU, Google's neural network hardware accelerator for low-power, edge devices. For the Edge TPU in Coral devices, these models enable real-time image classification performance while achieving accuracy typically seen only with larger, compute-heavy models running in data centers. On Pixel 4's Edge TPU, these models improve the accuracy-latency tradeoff over existing SoTA mobile models.

Keywords

Cite

@article{arxiv.2003.02838,
  title  = {Accelerator-aware Neural Network Design using AutoML},
  author = {Suyog Gupta and Berkin Akin},
  journal= {arXiv preprint arXiv:2003.02838},
  year   = {2020}
}

Comments

Accepted paper at the On-device Intelligence Workshop at MLSys Conference 2020

R2 v1 2026-06-23T14:05:35.662Z