Related papers: The First Switch Effect in Ferroelectric Field-Eff…
The ferroelectric field-effect transistor (Fe-FET) is a three-terminal semiconducting device first introduced in the 1950s. Despite its potential, a significant boost in Fe-FET research occurred about ten years ago with the discovery of…
We demonstrate ferroelectric (FE) memory transistors on a crystalline silicon channel with endurance exceeding $10^{10}$ cycles. The ferroelectric transistors (FeFETs) incorporate a high-$\kappa$ interfacial layer (IL) of thermally grown…
Ferroelectric field-effect transistors (FeFET) with two-dimensional (2D) semiconductor channels are promising low-power, embedded non-volatile memory (NVM) candidates for next-generation in-memory computing. However, the performance of…
A memory window of ferroelectric field-effect transistors (FeFETs), defined as a separation of the HIGH-state and the LOW-state threshold voltages, is an important measure of the FeFET memory characteristics. In this study, we theoretically…
In a ferroelectric field effect transistor (FeFET), it is generally assumed that the ferroelectric gate plays a purely electrostatic role. Recently it has been shown that in some cases, which could be called 'active FeFETs', electronic…
The gate defect of the ferroelectric HfO$_2$-based Si field-effect transistor (Si FeFET) plays a dominant role in its reliability issue. The first-principles calculations are an effective method for the atomic-scale understanding of gate…
Ferroelectric field-effect-transistor (FEFET) has emerged as a scalable solution for 3D NAND and embedded flash (eFlash), with recent progress in achieving large memory window (MW) using metal-insulator-ferroelectric-insulator-semiconductor…
Ferroelectric field-effect transistors employ a ferroelectric material as a gate insulator, the polarization state of which can be detected using the channel conductance of the device. As a result, the devices are of potential to use in…
Ferroelectric field-effect transistors (Fe-FETs) with ferroelectric hafnium oxide (FE HfO2) as gate insulator are being extensively explored as a promising device candidate for three-dimensional (3D) NAND memory application. FE HfO2…
We study the impact of top SiO2 interlayer thickness on the memory window (MW) of Si channel ferroelectric field-effect transistor (FeFET) with TiN/SiO2/Hf0.5Zr0.5O2/SiOx/Si (MIFIS) gate structure. We find that the MW increases with the…
We investigate the charge trapping during endurance fatigue of FeFET with TiN/Hf0.5Zr0.5O2/SiO2/Si (MFIS) gate structure. We propose a method of experimentally extracting the number of trapped charges during the memory operation, by…
Gate bias stress instability in organic field-effect transistors (OFETs) is a major conceptual and device issue. This effect manifests itself by an undesirable shift of the transfer characteristics and is associated with long term charge…
In this letter, the transient behavior of a ferroelectric (FE) metal-oxide-semiconductor (MOS) capacitor is theoretically investigated with a series resistor. It is shown that compared to a conventional high-k dielectric MOS capacitor, a…
Long-range moire patterns in twisted WSe2 enable a built-in, moire-length-scale ferroelectric polarization that can be directly harnessed in electronic devices. Such a built-in ferroic landscape offers a compelling means to enable…
The primary mechanism of operation of almost all transistors today relies on electric-field effect in a semiconducting channel to tune its conductivity from the conducting 'on'-state to a non-conducting 'off'-state. As transistors continue…
We present a study based on numerical simulations and comparative analysis of recent experimental data concerning the operation and design of FeFETs. Our results show that a proper consideration of charge trapping in the…
Neuromorphic computing architectures enable the dense co-location of memory and processing elements within a single circuit. This co-location removes the communication bottleneck of transferring data between separate memory and computing…
We study the impact of different interlayers and ferroelectric materials on charge trapping during the endurance fatigue of Si FeFET with TiN/HfxZr1-xO2/interlayer/Si (MFIS) gate stack. We have fabricated FeFET devices with different…
The charge doped into a semiconductor in a field effect transistor (FET) is generally confined to the interface of the semiconductor. A planar step at the interface causes a potential drop due to the strong electric field of the FET, which…
We investigate the effect of top Al2O3 interlayer thickness on the memory window (MW) of Si channel ferroelectric field-effect transistors (Si-FeFETs) with TiN/Al$_2$O$_3$/Hf$_{0.5}$Zr$_{0.5}$O$_2$/SiO$_x$/Si (MIFIS) gate structure. We find…