Related papers: A Folded Surface Code Architecture for 2D Quantum …

The non-local interactions in several quantum device architectures allow for the realization of more compact quantum encodings while retaining the same degree of protection against noise. Anticipating that short to medium-length codes will…

Practical quantum advantage is expected to depend on fault-tolerant quantum computing, although the architectural overhead needed to support fault tolerance is still extremely high. Prior FTQC designs generally emphasize either fast…

We present a fault-tolerant mapping of rotated surface codes onto a $2\times N$ silicon spin-qubit railway architecture, utilizing electron shuttling to resolve the wiring fan-out bottleneck. Employing circuit-level noise modeling, we…

Quantum computing (QC) is at the cusp of a revolution. Machines with 100 quantum bits (qubits) are anticipated to be operational by 2020 [googlemachine,gambetta2015building], and several-hundred-qubit machines are around the corner.…

Two-level quantum systems, qubits, are not the only basis for quantum computation. Advantages exist in using qudits, d-level quantum systems, as the basic carrier of quantum information. We show that color codes, a class of topological…

The performance of quantum error correction schemes depends sensitively on the physical realizations of the qubits and the implementations of various operations. For example, in quantum dot spin qubits, readout is typically much slower than…

Modular architectures offer a scalable path toward fault-tolerant quantum computing by interconnecting smaller quantum processing units (QPUs) provided that high-rate, fault-tolerant interfaces can be realized across modules. We present a…

The surface code is designed to suppress errors in quantum computing hardware and currently offers the most believable pathway to large-scale quantum computation. The surface code requires a 2-D array of nearest-neighbor coupled qubits that…

Quantum low-density parity-check (qLDPC) codes can achieve high encoding rates and good code distance scaling, providing a promising route to low-overhead fault-tolerant quantum computing. However, the long-range connectivity required to…

We introduce a framework for implementing logic in CSS quantum error correction codes, building on the surgery methods of Cowtan and Burton [CB24]. Our approach offers a systematic methodology for designing and analysing surgery protocols.…

In principle a 1D array of nearest-neighbour linked qubits is compatible with fault tolerant quantum computing. However such a restricted topology necessitates a large overhead for shuffling qubits and consequently the fault tolerance…

The surface code is a quantum error-correcting code for one logical qubit, protected by spatially localized parity checks in two dimensions. Due to fundamental constraints from spatial locality, storing more logical qubits requires either…

Quantum LDPC codes promise significant reductions in physical qubit overhead compared with topological codes. However, many existing constructions for performing logical operations come with distance-dependent temporal overheads. We…

Quantum error-correcting codes with high encoding rate are good candidates for large-scale quantum computers as they use physical qubits more efficiently than codes of the same distance that encode only a few logical qubits. Some logical…

We propose a scalable trapped-ion quantum-computing architecture that efficiently incorporates quantum error correction. The chip design exploits orthogonal qubit connectivity by assigning horizontal trap regions to transversal logical…

Exploring an efficient and scalable architecture of fault-tolerant quantum computing (FTQC) is vital for demonstrating useful quantum computing. Here, we propose and evaluate a scalable and practical architecture with a…

Using a multi-layered printed circuit board, we propose a 3D architecture suitable for packaging supercon- ducting chips, especially chips that contain two-dimensional qubit arrays. In our proposed architecture, the center strips of the…

We present a scalable scheme for executing the error-correction cycle of a monolithic surface-code fabric composed of fast-flux-tuneable transmon qubits with nearest-neighbor coupling. An eight-qubit unit cell forms the basis for repeating…

Motivated by the prospect of a two-dimensional square-lattice geometry for semiconductor spin qubits, we explore the realization of the Parity Architecture with quantum dots (QDs). We present sequences of spin shuttling and quantum gates…

Recent experimental progress in realizing surface code on hardware, including demonstrations of break-even logical memory on devices with up to hundreds of physical qubits, has materially advanced the prospects for fault-tolerant quantum…