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Multi-head Latent Attention (MLA) significantly reduces KVCache memory usage in Large Language Models while introducing substantial computational overhead and intermediate variable expansion. This poses challenges for efficient hardware…

Machine Learning · Computer Science 2025-10-23 Qichen Liao , Chengqiu Hu , Fangzheng Miao , Bao Li , Yiyang Liu , Junlong Lyu , Lirui Jiang , Jun Wang , Lingchao Zheng , Jun Li , Yuwei Fan

This paper presents a comprehensive comparison of three dominant parallel programming models in High Performance Computing (HPC): Message Passing Interface (MPI), Open Multi-Processing (OpenMP), and Compute Unified Device Architecture…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-06-19 Nizar ALHafez , Ahmad Kurdi

Large Language Models (LLMs) have resulted in a surging demand for planet-scale serving systems, where tens of thousands of GPUs continuously serve hundreds of millions of users. Consequently, throughput has emerged as a key metric that…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-05-27 Kan Zhu , Yufei Gao , Yilong Zhao , Liangyu Zhao , Gefei Zuo , Yile Gu , Dedong Xie , Tian Tang , Qinyu Xu , Zihao Ye , Keisuke Kamahori , Chien-Yu Lin , Ziren Wang , Stephanie Wang , Arvind Krishnamurthy , Baris Kasikci

Modern heterogeneous supercomputing systems are comprised of CPUs, GPUs, and high-speed network interconnects. Communication libraries supporting efficient data transfers involving memory buffers from the GPU memory typically require the…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-06-29 Naveen Namashivayam , Krishna Kandalla , James B White , Larry Kaplan , Mark Pagel

Modern AI accelerators rely on matrix multiply-accumulate units (MMAUs), such as NVIDIA Tensor Cores and AMD Matrix Cores, to accelerate deep neural network workloads. MMAUs expose only instruction-level or API-level interfaces of matrix…

Hardware Architecture · Computer Science 2026-04-17 Peichen Xie , Shuotao Xu , Yang Wang , Fan Yang , Mao Yang

Deep neural networks conventionally employ end-to-end backpropagation for their training process, which lacks biological credibility and triggers a locking dilemma during network parameter updates, leading to significant GPU memory use.…

Computer Vision and Pattern Recognition · Computer Science 2024-08-13 Junhao Su , Changpeng Cai , Feiyu Zhu , Chenghao He , Xiaojie Xu , Dongzhi Guan , Chenyang Si

Key-value (KV) cache memory management is the primary bottleneck limiting throughput and cost-efficiency in large-scale GPU inference serving. Current systems suffer from three compounding inefficiencies: (1) the absence of unified KV cache…

Hardware Architecture · Computer Science 2026-05-01 Sanjeev Rao Ganjihal

Wireless objects equipped with multiple antennas are able to simultaneously transmit multiple packets by exploiting the channel's spatial dimensions. In this paper, we study the benefits of such Multiple Packet Transmission (MPT) approach,…

Networking and Internet Architecture · Computer Science 2013-06-25 Boris Bellalta , Azadeh Faridi , Dirk Staehle , Jaume Barcelo , Alexey Vinel , Miquel Oliver

FPGAs are increasingly utilized in data centers due to their capacity to exploit data parallelism in computationally intensive workloads. Furthermore, the processing of modern data center workloads requires moving vast amounts of data,…

Hardware Architecture · Computer Science 2025-07-02 Andrea Galimberti , Gabriele Montanaro , Andrea Motta , Federico Proverbio , Davide Zoni

Point-based 3D point cloud models employ computation and memory intensive mapping functions alongside NN layers for classification/segmentation, and are executed on server-grade GPUs. The sparse, and unstructured nature of 3D point cloud…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-12-30 Amur Saqib Pal , Muhammad Mohsin Ghaffar , Faisal Shafait , Christian Weis , Norbert Wehn

PCIe devices, such as SSDs and GPUs, are pivotal in modern data centers, and their value is set to grow amidst the emergence of AI and large models. However, these devices face onboard DRAM shortage issue due to internal space limitation,…

Hardware Architecture · Computer Science 2024-06-05 Jiapin Wang , Xiangping Zhang , Chenlei Tang , Xiang Chen , Tao Lu

Over the past two decades, the storage capacity and access bandwidth of main memory have improved tremendously, by 128x and 20x, respectively. These improvements are mainly due to the continuous technology scaling of DRAM (dynamic…

Hardware Architecture · Computer Science 2017-12-25 Kevin K. Chang

In this work, we identify and address the core challenges of agentic memory management in LLM serving, where large-scale storage, frequent updates, and multiple coexisting agents jointly introduce complex and high-cost approximate nearest…

Multiagent Systems · Computer Science 2026-02-26 Zhengding Hu , Zaifeng Pan , Prabhleen Kaur , Vibha Murthy , Zhongkai Yu , Yue Guan , Zhen Wang , Steven Swanson , Yufei Ding

Supported by their high power efficiency and recent advancements in High Level Synthesis (HLS), FPGAs are quickly finding their way into HPC and cloud systems. Large amounts of work have been done so far on loop and area optimizations for…

Hardware Architecture · Computer Science 2020-02-17 Hamid Reza Zohouri , Satoshi Matsuoka

This work introduces a GPU storage expansion solution utilizing CXL, featuring a novel GPU system design with multiple CXL root ports for integrating diverse storage media (DRAMs and/or SSDs). We developed and siliconized a custom CXL…

Leadership supercomputers feature a diversity of storage, from node-local persistent memory and NVMe SSDs to network-interconnected flash memory and HDD. Memory mapping files on different tiers of storage provides a uniform interface in…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-10-18 Ivy B. Peng , Marty McFadden , Eric Green , Keita Iwabuchi , Kai Wu , Dong Li , Roger Pearce , Maya Gokhale

With the increasing usage of Machine Learning (ML) in High energy physics (HEP), there is a variety of new analyses with a large spread in compute resource requirements, especially when it comes to GPU resources. For institutes, like the…

High Energy Physics - Experiment · Physics 2025-05-14 Tim Voigtländer , Manuel Giffels , Günter Quast , Matthias Schnepf , Roger Wolf

The growing volume of data in modern applications has led to significant computational costs in conventional processor-centric systems. Processing-in-memory (PIM) architectures alleviate these costs by moving computation closer to memory,…

Hardware Architecture · Computer Science 2025-04-23 Geraldo F. Oliveira , Alain Kohli , David Novo , Ataberk Olgun , A. Giray Yaglikci , Saugata Ghose , Juan Gómez-Luna , Onur Mutlu

High-performance computing are based more and more in heterogeneous architectures and GPGPUs have become one of the main integrated blocks in these, as the recently emerged Mali GPU in embedded systems or the NVIDIA GPUs in HPC servers. In…

Distributed, Parallel, and Cluster Computing · Computer Science 2014-07-28 Albert Saà-Garriga , David Castells-Rufas , Jordi Carrabina

LLM decoding is bottlenecked for large batches and long contexts by loading the key-value (KV) cache from high-bandwidth memory, which inflates per-token latency, while the sequential nature of decoding limits parallelism. We analyze the…

Machine Learning · Computer Science 2025-05-28 Ted Zadouri , Hubert Strauss , Tri Dao