Related papers: Comparative Evaluation of Xilinx RFSoC Platform fo…

Low Level RF (LLRF) control systems of linear accelerators (LINACs) are typically implemented with heterodyne based architectures, which have complex analog RF mixers for up and down conversion. The Gen 3 Radio Frequency System-on-Chip…

The Low-Level RF (LLRF) control circuits of linear accelerators (LINACs) are conventionally realized with heterodyne based architectures, which have analog RF mixers for up and down conversion with discrete data converters. We have…

High precision Low-level RF (LLRF) control and monitoring systems for future particle accelerators will be a significant technical challenge as the requirements in performance, flexibility and affordability become increasingly stringent. We…

This work describes the LLRF and control system in use for a novel accelerator structure developed for a compact design operating in C-band developed by SLAC, with collaboration from RadiaBeam and RadiaSoft. This design is a pulsed…

The Advanced Light Source (ALS) at LBNL is upgrading several LLRF systems for its Linac and Sub-Harmonic Bunchers, where it is desired to have a unified LLRF system design to support various RF frequencies (at 125MHz, 500MHz and 3GHz) and…

A compact low-level RF (LLRF) control system based on RF system-on-chip (RFSoC) technology has been designed for the Advanced Concept Compact Electron Linear-accelerator (ACCEL) program, which has challenging requirements in both RF…

The low-level RF (LLRF) systems for S-band linear accelerating structures are typically implemented with heterodyne base architectures. We have developed and characterized the next generation LLRF (NG-LLRF) based on the RF system-on-chip…

Hardware acceleration has emerged as a key research topic for supporting computationally intensive signal processing and artificial intelligence applications in 6G research and development studies. This paper presents an RF Network on Chip…

The low-level RF (LLRF) systems for linear accelerating structures are typically based on heterodyne architectures. The linear accelerators normally have many RF stations and multiple RF inputs and outputs for each station, so the…

Normal conducting linear particle accelerators consist of multiple rf stations with accelerating structure cavities. Low-level rf (LLRF) systems are employed to set the phase and amplitude of the field in the accelerating structure, and to…

Radiation measurement relies on pulse detection, which can be performed using various configurations of high-speed analog-to-digital converters (ADCs) and field-programmable gate arrays (FPGAs). For optimal power consumption, design…

Emerging wireless applications such as 5G cellular, large intelligent surfaces (LIS), and holographic massive MIMO require antenna array processing at mm-wave frequencies with large numbers of independent digital transceivers. This paper…

RF system-on-chip (RFSoC) devices provide the potential for implementing a complete radio astronomy receiver on a single board, but performance of the integrated analogue-to-digital converters is critical. We have evaluated the performance…

With the evolution of heterogeneous computing system, such as network-on-chip, high-performance distributed computing, accelerator-rich architectures and cluster computing, high-speed, energy-efficient and low-latency interfaces among…

Unlike traditional PCIe-based FPGA accelerators, heterogeneous SoC-FPGA devices provide tighter integrations between software running on CPUs and hardware accelerators. Modern heterogeneous SoC-FPGA platforms support multiple I/O cache…

Prior art has proposed a secondary application for Global Navigation Satellite System (GNSS) infrastructure for remote sensing of ground-based and maritime targets. Here, a passive radar receiver is deployed to detect uncooperative targets…

This work reports the performance evaluation of an SDR readout system based on the latest generation (Gen3) of the AMD's Radio Frequency System-on-Chip (RFSoC) processing platform, which integrates a full-stack processing system and a…

RF photonic transversal signal processors, which combine reconfigurable electrical digital signal processing and high-bandwidth photonic processing, provide a powerful solution for achieving adaptive high-speed information processing.…

In this paper, we implement a low-latency rapid-prototyping platform for signal processing based on software-defined radios (SDRs) and off-the-shelf PC hardware. This platform allows to evaluate a wide variety of algorithms in real-time…

The proposed Next Linear Collider (NLC) contains linac systems operating at L,S,C, and X band. This paper describes a wideband modular low-level RF (LLRF) system applicable for all NLC pulsed RF systems. High speed digital IF techniques are…