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This paper presents a methodology for simultaneous heterogeneous computing, named ENEAC, where a quad core ARM Cortex-A53 CPU works in tandem with a preprogrammed on-board FPGA accelerator. A heterogeneous scheduler distributes the tasks…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-11-16 Kris Nikov , Mohammad Hosseinabady , Rafael Asenjo , Andrés Rodríguezz , Angeles Navarro , Jose Nunez-Yanez

Transformers, while revolutionary, face challenges due to their demanding computational cost and large data movement. To address this, we propose HyFlexPIM, a novel mixed-signal processing-in-memory (PIM) accelerator for inference that…

Hardware Architecture · Computer Science 2025-06-03 Chang Eun Song , Priyansh Bhatnagar , Zihan Xia , Nam Sung Kim , Tajana Rosing , Mingu Kang

State-space models (SSMs) have recently attention as an efficient alternative to computationally expensive attention-based models for sequence modeling. They rely on linear recurrences to integrate information over time, enabling fast…

Machine Learning · Computer Science 2026-01-01 Mahdi Karami , Ali Behrouz , Peilin Zhong , Razvan Pascanu , Vahab Mirrokni

With the increasing volumes of Large Language Models (LLMs) and the expanding context lengths, attention computation has become a key performance bottleneck in LLM serving. For fast attention computation, recent practices often parallelize…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-03-12 Di Liu , Yifei Liu , Chen Chen , Zhibin Yu , Xiaoyi Fan , Quan Chen , Minyi Guo

In this paper, we address some of the key limitations to realizing a generic heterogeneous parallel programming model for quantum-classical heterogeneous platforms. We discuss our experience in enabling user-level multi-threading in QCOR as…

Speculative decoding enhances the inference efficiency of large language models (LLMs) by generating drafts using a small draft language model (DLM) and verifying them in batches with a large target language model (TLM). However, adaptive…

Hardware Architecture · Computer Science 2026-05-01 Ma Zirui , Fan Zhihua , Li Wenxing , Wu Haibin , Zhang Fulin , Ye Xiaochun , Li Wenming

This paper presents the Dynamic Simultaneous Multi-threaded Architecture (DSMT). DSMT efficiently exe-cutes multiple threads from a single program on a SMT processor core. To accomplish this, threads are generated dynamically from a…

Hardware Architecture · Computer Science 2024-09-16 Daniel Ortiz-Arroyo , Ben Lee

Sequence modeling is crucial for AI to understand temporal data and detect complex time-dependent patterns. While recurrent neural networks (RNNs), convolutional neural networks (CNNs), and Transformers have advanced in capturing long-range…

Machine Learning · Computer Science 2025-08-08 Shiva Raja , Cansu Demirkiran , Aakash Sarkar , Milos Popovic , Ajay Joshi

Supercomputer architectures are trending toward higher computational throughput due to the inclusion of heterogeneous compute nodes. These multi-GPU nodes increase on-node computational efficiency, while also increasing the amount of data…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-09-14 Shelby Lockhart , Amanda Bienz , William D. Gropp , Luke N. Olson

Industrial domains such as automotive, robotics, and aerospace are rapidly evolving to satisfy the increasing demand for machine-learning-driven Autonomy, Connectivity, Electrification, and Shared mobility (ACES). This paradigm shift…

Hardware Architecture · Computer Science 2026-02-11 Thomas Benz

Semi-supervised change detection (SSCD) aims to detect changes between bi-temporal remote sensing images by utilizing limited labeled data and abundant unlabeled data. Existing methods struggle in complex scenarios, exhibiting poor…

Computer Vision and Pattern Recognition · Computer Science 2025-09-30 Qi'ao Xu , Pengfei Wang , Yanjun Li , Tianwen Qian , Xiaoling Wang

The trend in industry is towards heterogeneous multicore processors (HMCs), including chips with CPUs and massively-threaded throughput-oriented processors (MTTOPs) such as GPUs. Although current homogeneous chips tightly couple the cores…

Hardware Architecture · Computer Science 2013-10-30 Blake A. Hechtman , Daniel J. Sorin

Multicore embedded systems have been constantly researched to improve the efficiency by changing certain metrics, such as processor, memory, cache hierarchies and their cache configurations. Using Multi2Sim and McPAT simulators in…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-01-14 Gorker Alp Malazgirt , Deniz Candas , Arda Yurdakul

Reliable planning is crucial for achieving autonomous driving. Rule-based planners are efficient but lack generalization, while learning-based planners excel in generalization yet have limitations in real-time performance and…

Robotics · Computer Science 2025-06-02 Yuqi Fan , Zhiyong Cui , Zhenning Li , Yilong Ren , Haiyang Yu

Emerging applications such as AR are driving demands for machine intelligence capable of processing continuous and/or long-context inputs on local devices. However, currently dominant models based on Transformer architecture suffers from…

Hardware Architecture · Computer Science 2026-03-24 Saptarshi Mitra , Rachid Karami , Haocheng Xu , Sitao Huang , Hyoukjun Kwon

Multiple applications executing concurrently on a multicore system interfere with each other at different shared resources such as main memory and shared caches. Such inter-application interference, if uncontrolled, results in high system…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-08-14 Lavanya Subramanian

The rising use of deep learning and other big-data algorithms has led to an increasing demand for hardware platforms that are computationally powerful, yet energy-efficient. Due to the amount of data parallelism in these algorithms,…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-10-08 Biresh Kumar Joardar , Ryan Gary Kim , Janardhan Rao Doppa , Partha Pratim Pande , Diana Marculescu , Radu Marculescu

Sparse matrix-matrix multiplication (SpGEMM) is a critical operation in numerous fields, including scientific computing, graph analytics, and deep learning. These applications exploit the sparsity of matrices to reduce storage and…

Machine Learning · Computer Science 2024-08-30 Sanjali Yadav , Bahar Asgari

When multiple processor cores (CPUs) and a GPU integrated together on the same chip share the off-chip DRAM, requests from the GPU can heavily interfere with requests from the CPUs, leading to low system performance and starvation of cores.…

Hardware Architecture · Computer Science 2018-05-01 Rachata Ausavarungnirun , Gabriel H. Loh , Lavanya Subramanian , Kevin Chang , Onur Mutlu

Non-volatile main memory (NVRAM) technologies provide an attractive set of features for large-scale graph analytics, including byte-addressability, low idle power, and improved memory-density. NVRAM systems today have an order of magnitude…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-06-01 Laxman Dhulipala , Charlie McGuffey , Hongbo Kang , Yan Gu , Guy E. Blelloch , Phillip B. Gibbons , Julian Shun