Related papers: How to Identify Suitable Gate Dielectrics for Tran…
The availability of transistors capable of operating at low supply voltage is essential to improve the key performance metric of computing circuits, i.e., the number of operations per unit energy. In this paper, we propose a new device…
Theoretical treatments of tunneling in electronic devices are often based on one-dimensional (1D) approximations. Here we show that for many nanoscale devices, such as widely studied semiconductor gate-defined quantum dots, 1D…
Nanoscale electronic devices are of great interest for all kinds of applications like switching, energy conversion and sensing. The objective of this chapter, however, is not to discuss specific devices or applications. Rather it is to…
Stacked van der Waals (vdW) heterostructures where semi-conducting two-dimensional (2D) materials are contacted by overlayed graphene electrodes enable atomically-thin, flexible electronics. We use first-principles quantum transport…
Fast cryogenic switches with ultra-low power dissipation are highly sought-after for control electronics of quantum computers, space applications and next generation logic circuits. However, existing high-frequency switches are often bulky,…
Two-dimensional, solution-processable semiconductor materials are anticipated to be used in low-cost electronic applications, such as transistors and solar cells. Here, lead sulfide nanosheets with a lateral size of several microns are…
The layered semimetal WTe_2 has recently been found to be a two-dimensional topological insulator (2D TI) when thinned down to a single monolayer, with conducting helical edge channels. We report here that intrinsic superconductivity can be…
A vertical transistor based on a double gated, atomically thin heterojunction is theoretically examined. Both p-type and n-type transistor operations can be conveniently achieved by using one of the two gates as the switching gate. The…
The aim of this work is to present the optimization of the gate trench module for use in vertical GaN devices in terms of cleaning process of the etched surface of the gate trench, thickness of gate dielectric and magnesium concentration of…
The relevant length scales for superconductivity are of the order of nanometers. By confining the superconducting condensate to such dimensions, many physical properties change substantially, and novel phenomena emerge, which are absent in…
Atomically-thin two-dimensional (2D) layered transition metal dichalcogenides (TMDs) have been extensively studied in recent years because of their appealing electrical and optical properties. Here, we report on the fabrication of ReS2…
Layered metal chalcogenide materials provide a versatile platform to investigate emergent phenomena and two-dimensional (2D) superconductivity at/near the atomically thin limit. In particular, gate-induced interfacial superconductivity…
Two-dimensional (2D) transition metal dichalcogenides (TMDCs) with unique electrical properties are fascinating materials used for future electronics. However, the strong Fermi level pinning effect at the interface of TMDCs and metal…
The demands on detectors for particle detection as well as for medical and astronomical X-ray imaging are continuously pushing the development of novel pixel detectors. The state of the art in pixel detector technology to date are hybrid…
We realized ambipolar Field-Effect Transistors by coupling exfoliated thin flakes of tungsten disulphide (WS2) with an ionic liquid-dielectric. The devices show ideal electrical characteristics, including very steep sub-threshold slopes for…
Gate bias stress instability in organic field-effect transistors (OFETs) is a major conceptual and device issue. This effect manifests itself by an undesirable shift of the transfer characteristics and is associated with long term charge…
Thermoelectric devices at the nanoscale offer promising routes for on-chip refrigeration and waste-heat recovery, yet most semiconductor-based implementations suffer from limited tunability and narrow operational ranges. We introduce a…
We report a method for making horizontal wrap-gate nanowire transistors with up to four independently controllable wrap-gated segments. While the step up to two independent wrap-gates requires a major change in fabrication methodology, a…
We performed a comprehensive scaling study of Schottky barrier carbon nanotube transistors using self-consistent, atomistic scale simulations. We restrict our attention to Schottky barrier carbon nanotube FETs whose metal source/drain is…
Transistors, regardless of their size, rely on electrical gates to control the conductance between source and drain contacts. In atomic-scale transistors, this conductance is exquisitely sensitive to single electrons hopping via individual…