Related papers: Robust Synchronous Reference Frame Phase-Looked Lo…

This letter proposes a new design of frequency-locked loop (FLL) which is based on synchronous (dq) reference frame instead of stationary ({\alpha}\b{eta}) reference frame. First, a synchronous reference frame FLL (briefly called SRF-FLL0)…

Non-contact scanning probe microscopy (SPM) has developed into a powerful technique to image many different properties of samples. The conventional method involves monitoring the amplitude, phase or frequency of a cantilever oscillating at…

We consider a grid-connected voltage source converter (VSC) and address the problem of estimating the grid angle and frequency, information that is essential for an appropriate operation of the converter. We design phase-locked loop (PLL)…

The presented paper introduces a design for a phase-locked loop (PLL) that is utilized in frequency synthesis and modulation-demodulation within communication systems and in VLSI applications. The CMOS PLL is designed using 180 nm…

Many speech and music analysis and processing schemes rely on an estimate of the fundamental frequency $f_0$ of periodic signal components. Most established schemes apply rather unspecific signal models such as sinusoidal models to the…

Phase-locked loops (PLLs) are now widely used in communication systems and have been a classic system for more than 60 years. Well-known mathematical models of such systems are constructed in a number of approximations, so questions about…

Fluctuations in phase angle and frequency under large disturbances can lead to loss of synchronism (LOS) in grid-following (GFL) converters. The power angle and frequency of synchronous generators (SGs) correspond to rotor position and…

Differing from synchronous generators, there are lack of physical laws governing the synchronization dynamics of voltage-source converters (VSCs). The widely used phase-locked loop (PLL) plays a critical role in maintaining the synchronism…

Charge pump phase-locked loop with phase-frequency detector (CP-PLL) is an electrical circuit, widely used in digital systems for frequency synthesis and synchronization of the clock signals. In this paper a non-linear second-order model of…

In MIMO systems, the presence of phase noise is a significant factor that can degrade performance. For MIMO testbeds build from SDR devices, phase noise cannot be ignored, particular in applications that require phase synchronization. This…

Nanomechanical resonators can serve as high performance detectors and have potential to be widely used in the industry for a variety of applications. Most nanomechanical sensing applications rely on detecting changes of resonance frequency.…

In this paper we discuss the application of the harmonic balance method for the global analysis of the classical phase-locked loop (PLL) circuit. The harmonic balance is non rigorous method, which is widely used %,often without rigorous…

Existing sub-/super-synchronous (SSO) suppression methods for the direct-drive permanent magnet synchronous generators (D-PMSG) integrated power systems are mainly achieved by external devices or sub-synchronous resonance damping controller…

Grid-following (GFL) inverters are commonly used for integrating renewable energy sources into power grids. However, the dynamic performance of GFL models can be significantly impacted by the Phase-Locked Loop (PLL) in a weak grid, leading…

Large Language Models (LLMs) are powerful but often too slow and costly for real-world use during inference. Looped transformers save on parameters by reusing the same weights for multiple computational steps, or "loops." However, this…

Modern communication and computer systems require rapid (Gbps), efficient and large bandwidth data transfers. Agressive scaling of digital integrated systems allow buses and communication controller circuits to be integrated with the…

Phase-locked loop (PLL), conceived in 1932 by H. Bellescize, has been the basic electronic component in the development of communication technology from the early analog radio receptors to modern digital civil and military facilities.…

We propose a delay-dependent sampled-data output-feedback LPV control technique to address the air-fuel ratio (AFR) regulation problem in spark ignition (SI) engines. AFR control and advanced fueling strategies are essential for maximizing…

Clock generation is an essential part of wireless or wireline communication modules. To facilitate recent advancements in wireline-like communication and in-sensor computing modules at relatively lower data rates, ultra-low power, and…

This paper introduces an efficient Residual Reinforcement Learning (RRL) framework for voltage control in active distribution grids. Voltage control remains a critical challenge in distribution grids, where conventional Reinforcement…