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Lookup tables (LUTs) have recently gained attention as an alternative compute mechanism that maps input operands to precomputed results, eliminating the need for arithmetic logic. LUTs not only reduce logic complexity, but also naturally…

Hardware Architecture · Computer Science 2026-04-07 Junguk Hong , Changmin Shin , Sukjin Kim , Si Ung Noh , Taehee Kwon , Seongyeon Park , Hanjun Kim , Youngsok Kim , Jinho Lee

Binary neural networks (BNNs) that use 1-bit weights and activations have garnered interest as extreme quantization provides low power dissipation. By implementing BNNs as computing-in-memory (CIM), which computes multiplication and…

Machine Learning · Computer Science 2021-10-20 Minh-Son Le , Thi-Nhan Pham , Thanh-Dat Nguyen , Ik-Joon Chang

In recent years, Compute-in-memory (CiM) architectures have emerged as a promising solution for deep neural network (NN) accelerators. Multiply-accumulate~(MAC) is considered a {\textit de facto} unit operation in NNs. By leveraging the…

Signal Processing · Electrical Eng. & Systems 2026-01-05 Dhandeep Challagundla , Ignatius Bezzam , Riadul Islam

Crossbar arrays of resistive memories (RRAM) hold the promise of enabling In-Memory Computing (IMC), but essential challenges due to the impact of device imperfection and device endurance have yet to be overcome. In this work, we…

Emerging Technologies · Computer Science 2022-03-04 E. Esmanhotto , T. Hirtzlin , N. Castellani , S. Martin , B. Giraud , F. Andrieu , J. F. Nodin , D. Querlioz , J-M. Portal , E. Vianello

Analog content-addressable memories (aCAMs) based on memristors provide a promising pathway toward energy-efficient large-scale associative computing for Edge AI and embedded intelligence applications. They have been successfully applied to…

Emerging Technologies · Computer Science 2026-05-13 Paul-Philipp Manea , Aishwarya Natarajan , Jim Ignowski , John Paul Strachan , Luca Buonanno

The deluge of sensors and data generating devices has driven a paradigm shift in modern computing from arithmetic-logic centric to data-centric processing. Data-centric processing require innovations at device level to enable novel…

This paper presents a novel architecture utilizing a 10T SRAM cell for XNOR-based in-memory computing, aimed at mitigating the extensive routing challenges typically encountered in conventional in-memory computing systems. By integrating a…

Hardware Architecture · Computer Science 2026-05-18 Narendra Singh Dhakad , Santosh Kumar Vishvakarma

Traditional von Neumann architectures suffer from fundamental bottlenecks due to continuous data movement between memory and processing units, a challenge that worsens with technology scaling as electrical interconnect delays become more…

Systems and Control · Electrical Eng. & Systems 2025-07-01 Md Abdullah-Al Kaiser , Sugeet Sunder , Ajey P. Jacob , Akhilesh R. Jaiswal

Memristor technology shows great promise for energy-efficient computing, yet it grapples with challenges like resistance drift and inherent variability. For filamentary Resistive RAM (ReRAM), one of the most investigated types of memristive…

To index the increasing volume of data, modern data indexes are typically stored on SSDs and cached in DRAM. However, searching such an index has resulted in significant I/O traffic due to limited access locality and inefficient cache…

Hardware Architecture · Computer Science 2024-08-05 Yun-Chih Chen , Yuan-Hao Chang , Tei-Wei Kuo

To address the increasing computational demands of artificial intelligence (AI) and big data, compute-in-memory (CIM) integrates memory and processing units into the same physical location, reducing the time and energy overhead of the…

Emerging Technologies · Computer Science 2023-09-19 Xiwen Liu , Keshava Katti , Yunfei He , Paul Jacob , Claudia Richter , Uwe Schroeder , Santosh Kurinec , Pratik Chaudhari , Deep Jariwala

In-memory computing on a reconfigurable architecture is the emerging field which performs an application-based resource allocation for computational efficiency and energy optimization. In this work, we propose a Ferroelectric…

The first contribution of this paper is the development of extremely dense, energy-efficient mixed-signal vector-by-matrix-multiplication (VMM) circuits based on the existing 3D-NAND flash memory blocks, without any need for their…

Emerging Technologies · Computer Science 2019-08-08 Mohammad Bavandpour , Shubham Sahay , Mohammad Reza Mahmoodi , Dmitri B. Strukov

Today's systems are overwhelmingly designed to move data to computation. This design choice goes directly against at least three key trends in systems that cause performance, scalability and energy bottlenecks: (1) data access from memory…

Hardware Architecture · Computer Science 2019-03-12 Onur Mutlu , Saugata Ghose , Juan Gómez-Luna , Rachata Ausavarungnirun

Processing-in-Memory (PIM) architectures offer promising solutions for efficiently handling AI applications in energy-constrained edge environments. While traditional PIM designs enhance performance and energy efficiency by reducing data…

Hardware Architecture · Computer Science 2025-12-09 Sangmin Jeon , Kangju Lee , Kyeongwon Lee , Woojoo Lee

Deployment of modern TinyML tasks on small battery-constrained IoT devices requires high computational energy efficiency. Analog In-Memory Computing (IMC) using non-volatile memory (NVM) promises major efficiency improvements in deep neural…

Hardware Architecture · Computer Science 2022-01-05 Angelo Garofalo , Gianmarco Ottavi , Francesco Conti , Geethan Karunaratne , Irem Boybat , Luca Benini , Davide Rossi

The substantial memory bandwidth and computational demands of large language models (LLMs) present critical challenges for efficient inference. To tackle this, the literature has explored heterogeneous systems that combine neural processing…

Hardware Architecture · Computer Science 2026-05-05 Yuzong Chen , Chao Fang , Xilai Dai , Yuheng Wu , Thierry Tambe , Marian Verhelst , Mohamed S. Abdelfattah

Processing-in-memory (PIM) is a promising computing paradigm to tackle the "memory wall" challenge. However, PIM system-level benefits over traditional von Neumann architecture can be reduced when the memory array cannot fully store all the…

Hardware Architecture · Computer Science 2025-03-03 Peilin Chen , Xiaoxuan Yang

DRAM is the prevalent main memory technology, but its long access latency can limit the performance of many workloads. Although prior works provide DRAM designs that reduce DRAM access latency, their reduced storage capacities hinder the…

Hardware Architecture · Computer Science 2020-05-27 Haocong Luo , Taha Shahroodi , Hasan Hassan , Minesh Patel , Abdullah Giray Yaglikci , Lois Orosa , Jisung Park , Onur Mutlu

In the "Big Data" era, a lot of data must be processed and moved between processing and memory units. New technologies and architectures have emerged to improve system performance and overcome the memory bottleneck. The memristor is a…

Hardware Architecture · Computer Science 2026-02-26 Seyed Erfan Fatemieh , Samane Asgari , Mohammad Reza Reshadinezhad
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