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Past research has proposed numerous hardware prefetching techniques, most of which rely on exploiting one specific type of program context information (e.g., program counter, cacheline address) to predict future memory accesses. These…

Hardware Architecture · Computer Science 2023-04-07 Rahul Bera , Konstantinos Kanellopoulos , Anant V. Nori , Taha Shahroodi , Sreenivas Subramoney , Onur Mutlu

Modern computer designs support composite prefetching, where multiple individual prefetcher components are used to target different memory access patterns. However, multiple prefetchers competing for resources can drastically hurt…

Hardware Architecture · Computer Science 2023-07-18 Erika S. Alcorta , Mahesh Madhav , Scott Tetrick , Neeraja J. Yadwadkar , Andreas Gerstlauer

The promotion of large-scale applications of reinforcement learning (RL) requires efficient training computation. While existing parallel RL frameworks encompass a variety of RL algorithms and parallelization techniques, the excessively…

Machine Learning · Computer Science 2023-12-12 Jing Hou , Guang Chen , Ruiqi Zhang , Zhijun Li , Shangding Gu , Changjun Jiang

Reducing the average memory access time is crucial for improving the performance of applications running on multi-core architectures. With workload consolidation this becomes increasingly challenging due to shared resource contention.…

Hardware Architecture · Computer Science 2021-02-24 Nadja Ramhöj Holtryd , Madhavan Manivannan , Per Stenström , Miquel Pericàs

Despite the data-rich environment in which memory systems of modern computing platforms operate, many state-of-the-art architectural policies employed in the memory system rely on static, human-designed heuristics that fail to truly adapt…

Hardware Architecture · Computer Science 2026-03-17 Rahul Bera , Rakesh Nadig , Onur Mutlu

Prefetching and off-chip prediction are two techniques proposed to hide long memory access latencies in high-performance processors. In this work, we demonstrate that: (1) prefetching and off-chip prediction often provide complementary…

Cache prefetcher greatly eliminates compulsory cache misses, by fetching data from slower memory to faster cache before it is actually required by processors. Sophisticated prefetchers predict next use cache line by repeating program's…

Hardware Architecture · Computer Science 2017-12-05 Haoyuan Wang , Zhiwei Luo

The irregular nature of memory accesses of graph workloads makes their performance poor on modern computing platforms. On manycore reconfigurable architectures (MRAs), in particular, even state-of-the-art graph prefetchers do not work well…

Hardware Architecture · Computer Science 2023-01-31 Yichen Yang , Jingtao Li , Nishil Talati , Subhankar Pal , Siying Feng , Chaitali Chakrabarti , Trevor Mudge , Ronald Dreslinski

Reinforcement Learning (RL) has outperformed other counterparts in sequential decision-making and dynamic environment control. However, FPGA deployment is significantly resource-expensive, as associated with large number of computations in…

Hardware Architecture · Computer Science 2025-06-10 Anushka Jha , Tanushree Dewangan , Mukul Lokhande , Santosh Kumar Vishvakarma

Modern commodity computing systems are composed by a number of different heterogeneous processing units, each of which has its own unique performance and energy characteristics. However, the majority of current network packet processing…

Networking and Internet Architecture · Computer Science 2022-05-02 Giannis Giakoumakis , Eva Papadogiannaki , Giorgos Vasiliadis , Sotiris Ioannidis

High load latency that results from deep cache hierarchies and relatively slow main memory is an important limiter of single-thread performance. Data prefetch helps reduce this latency by fetching data up the hierarchy before it is…

Hardware Architecture · Computer Science 2021-03-30 Majid Jalili , Mattan Erez

Several learned policies have been proposed to replace heuristics for scheduling, caching, and other system components in modern systems. By leveraging diverse features, learning from historical trends, and predicting future behaviors, such…

Machine Learning · Computer Science 2025-10-14 Samuel Yuan , Divyanshu Saxena , Jiayi Chen , Nihal Sharma , Aditya Akella

With deep reinforcement learning (RL) methods achieving results that exceed human capabilities in games, robotics, and simulated environments, continued scaling of RL training is crucial to its deployment in solving complex real-world…

Machine Learning · Computer Science 2020-12-09 Ahmet Inci , Evgeny Bolotin , Yaosheng Fu , Gal Dalal , Shie Mannor , David Nellans , Diana Marculescu

L1 instruction (L1-I) cache misses are a source of performance bottleneck. Sequential prefetchers are simple solutions to mitigate this problem; however, prior work has shown that these prefetchers leave considerable potentials uncovered.…

Hardware Architecture · Computer Science 2021-02-04 Ali Ansari , Fatemeh Golshan , Pejman Lotfi-Kamran , Hamid Sarbazi-Azad

Reinforcement Learning (RL) has become the most effective post-training approach for improving the capabilities of Large Language Models (LLMs). In practice, because of the high demands on latency and memory, it is particularly challenging…

Multicore is an integrated circuit chip that uses two or more computational engines (cores) places in a single processor. This new approach is used to split the computational work of a threaded application and spread it over multiple…

Operating Systems · Computer Science 2019-10-03 Reza Fotohi , Mehdi Effatparvar , Fateme Sarkohaki , Shahram Behzad , Jaber Hoseini balov

Deep Reinforcement Learning (DRL) is vital in various AI applications. DRL algorithms comprise diverse compute kernels, which may not be simultaneously optimized using a homogeneous architecture. However, even with available heterogeneous…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-11-17 Yuan Meng , Michael Kinsner , Deshanand Singh , Mahesh A Iyer , Viktor Prasanna

As large language models (LLMs) continue to scale and new GPUs are released even more frequently, there is an increasing demand for LLM post-training in heterogeneous environments to fully leverage underutilized mid-range or…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-14 Yongjun He , Shuai Zhang , Jiading Gai , Xiyuan Zhang , Boran Han , Bernie Wang , Huzefa Rangwala , George Karypis

This paper focuses on the critical load restoration problem in distribution systems following major outages. To provide fast online response and optimal sequential decision-making support, a reinforcement learning (RL) based approach is…

Systems and Control · Electrical Eng. & Systems 2024-01-30 Xiangyu Zhang , Abinet Tesfaye Eseye , Bernard Knueven , Weijia Liu , Matthew Reynolds , Wesley Jones

Multi-tenancy for latency-critical applications leads to re-source interference and unpredictable performance. Core reconfiguration opens up more opportunities for colocation,as it allows the hardware to adjust to the dynamic performance…

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