Related papers: A 10-bit SAR ADC with 1.5x Input Range
Analog to digital converters (ADCs) act as a bridge between the analog and digital domains. Two important attributes of any ADC are sampling rate and its dynamic range. For bandlimited signals, the sampling should be above the Nyquist rate.…
This paper considers training-based transmissions in massive multi-input multi-output (MIMO) systems with one-bit analog-to-digital converters (ADCs). We assume that each coherent transmission block consists of a pilot training stage and a…
High hardware cost and high power consumption of massive multiple-input and multiple output (MIMO) are two challenges for the future wireless communications including beyond fifth generation (B5G) and sixth generation (6G). Adopting the…
The LAB4D is a new application-specific integrated circuit (ASIC) of the Large Analog Bandwidth Recorder and Digitizer with Ordered Readout (LABRADOR) family, for use in direct wideband radio frequency digitization such as is used in…
Leveraging the available millimeter wave spectrum will be important for 5G. In this work, we investigate the performance of digital beamforming with low resolution ADCs based on link level simulations including channel estimation, MIMO…
In this paper we prove optimality of a certain class of Analog to Digital Converters (ADCs), which can be viewed as generalized Delta-Sigma Modulators (DSMs), with respect to a performance measure that can be characterized as the worst-case…
We aim at investigating the impact of low resolution digital-to-analog converters (DACs) at the transmitter and low resolution analog-to-digital converters (ADCs) at the receiver on the required bandwidth and the required signalto- noise…
A wideband phase comparator for precise measurements of phase difference of high current shunts has been developed at INRIM. The two-input digital phase detector is realized with a precision wideband digitizer connected through a pair of…
This paper presents a novel circuit (AID) to improve the accuracy of an energy-efficient in-memory multiplier using a standard 6T-SRAM. The state-of-the-art discharge-based in-SRAM multiplication accelerators suffer from a non-linear…
To enable low-power and low-complexity wireless monitoring, an improved circuit design of Analog Joint Source Channel Coding (AJSCC) is proposed for wireless sensor nodes. This innovative design is based on Analog Divider Blocks (ADB) with…
In a growing number of applications, there is a need to digitize signals whose spectral characteristics are challenging for traditional Analog-to-Digital Converters (ADCs). Examples, among others, include systems where the ADC must acquire…
The use of low-resolution Analog-to-Digital Converters (ADCs) is a practical solution for reducing cost and power consumption for massive Multiple-Input-Multiple-Output (MIMO) systems. However, the severe nonlinearity of low-resolution ADCs…
This paper analyzes the performance of multicell massive multiple-input and multiple-output (MIMO) systems with variable-resolution analog-to-digital converters (ADCs). In such an architecture, each ADC uses arbitrary quantization…
Approximate computing is a nascent energy-efficient computing paradigm suitable for error-tolerant applications. However, the value of approximation error depends on the applied inputs where individual output error may reach intolerable…
In this paper we present the development of a Systematic high level design model based on MATLAB scripts. It is integrated into a graphical behavioral model toolbox for the synthesis and simulation of a Continuous-Time Delta Sigma ADC. For…
The wide bandwidth and large number of antennas used in millimeter wave systems put a heavy burden on the power consumption at the receiver. In this paper, using an additive quantization noise model, the effect of analog-digital conversion…
In this paper, we investigate the relationship between the dynamic range and quantization noise power in modulo analog-to-digital converters (ADCs). Two modulo ADC systems are considered: (1) a modulo ADC which outputs the folded samples…
Deep-learning accelerators are increasingly in demand; however, their performance is constrained by the size of the feature map, leading to high bandwidth requirements and large buffer sizes. We propose an adaptive scale feature map…
This paper deals with the task of finding certified lower bounds for the performance of Analog to Digital Converters (ADCs). A general ADC is modeled as a causal, discrete-time dynamical system with outputs taking values in a finite set. We…
An Artificial Magnetic Conductor (AMC) frame capable of improving the impedance matching of a 2$\times$2 array for 6G applications without degrading isolation performance is presented. The proposed frame is integrated into the array without…