English
Related papers

Related papers: Towards Deterministic Sub-0.5 us Response on Linux…

200 papers

Microarchitectural timing channels exploit information leakage between security domains that should be isolated, bypassing the operating system's security boundaries. These channels result from contention for shared microarchitectural…

Cryptography and Security · Computer Science 2024-09-13 Nils Wistoff , Gernot Heiser , Luca Benini

Acoustic-sensor-based soft error resilience is particularly promising, since it can verify the absence of soft errors and eliminate silent data corruptions at a low hardware cost. However, the state-of-the-art work incurs a significant…

Hardware Architecture · Computer Science 2022-02-22 Jianping Zeng , Hongjune Kim , Jaejin Lee , Changhee Jung

Consumer-electronics systems are becoming increasingly complex as the number of integrated applications is growing. Some of these applications have real-time requirements, while other non-real-time applications only require good average…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-11-28 Anna Minaeva , Premysl Sucha , Benny Akesson , Zdenek Hanzalek

When IP-packet processing is unconditionally carried out on behalf of an operating system kernel thread, processing systems can experience overload in high incoming traffic scenarios. This is especially worrying for embedded real-time…

Networking and Internet Architecture · Computer Science 2022-04-20 Christoph Blumschein , Ilja Behnke , Lauritz Thamsen , Odej Kao

IoT devices have become an integral part of our lives and the industry. Many of these devices run real-time systems or are used as part of them. As these devices receive network packets over IP networks, the network interface informs the…

Networking and Internet Architecture · Computer Science 2021-04-14 Franz Bender , Jan Jonas Brune , Nick Lauritz Keutel , Ilja Behnke , Lauritz Thamsen

Predictable execution time upon accessing shared memories in multi-core real-time systems is a stringent requirement. A plethora of existing works focus on the analysis of Double Data Rate Dynamic Random Access Memories (DDR DRAMs), or…

Hardware Architecture · Computer Science 2018-10-17 Mohamed Hassan

This work studies the design problem of feedback stabilizers for discrete-time systems with input delays. A backstepping procedure is proposed for disturbance-free discrete-time systems. The feedback law designed by using backstepping…

Optimization and Control · Mathematics 2012-12-05 Iasson Karafyllis , Miroslav Krstic

Consumer robotics demands consolidation of safety-critical control, perception pipelines, and user applications on shared multicore platforms. While static partitioning hypervisors provide hardware-enforced isolation, directly transplanting…

Robotics · Computer Science 2026-05-06 James Yen , Zhibai Huang , Zhixiang Wei , Tinghao Yi , Shupeng Zeng , Liang Pang , Songtao Xue , Zhengwei Qi

Modern microarchitectures are some of the world's most complex man-made systems. As a consequence, it is increasingly difficult to predict, explain, let alone optimize the performance of software running on such microarchitectures. As a…

Performance · Computer Science 2019-03-06 Andreas Abel , Jan Reineke

More and more industrial devices are connected to IP-based networks, as this is essential for the success of Industry 4.0. However, this interconnection also results in an increased attack surface for various network-based attacks. One of…

Cryptography and Security · Computer Science 2020-07-20 Florian Fischer , Matthias Niedermaier , Thomas Hanka , Peter Knauer , Dominik Merli

Isolating sensitive state and data can increase the security and robustness of many applications. Examples include protecting cryptographic keys against exploits like OpenSSL's Heartbleed bug or protecting a language runtime from native…

Cryptography and Security · Computer Science 2019-06-05 Anjo Vahldiek-Oberwagner , Eslam Elnikety , Nuno O. Duarte , Michael Sammler , Peter Druschel , Deepak Garg

Time-Aware Shaper (TAS) is a time-triggered scheduling mechanism that ensures bounded latency for time-critical Scheduled Traffic (ST) flows. The Linux kernel implementation (a.k.a TAPRIO) has limited capabilities due to varying CPU…

Networking and Internet Architecture · Computer Science 2023-10-12 Joydeep Pal , Deepak Choudhary , Nithish Krishnabharathi Gnani , Chandramani Singh , T. V. Prabhakar

In this paper we present our contribution in terms of synchronization processor for a SoC design methodology based on the theory of the latency insensitive systems (LIS) of Carloni et al. Our contribution consists in IP encapsulation into a…

Hardware Architecture · Computer Science 2011-11-09 Pierre Bomel , Eric Martin , Emmanuel Boutillon

We address the problem of attack detection and attack correction for multi-output discrete-time linear time-invariant systems under sensor attack. More specifically, we focus on the situation where adversarial attack signals are added to…

Signal Processing · Electrical Eng. & Systems 2017-11-16 Zhanghan Tang , Margreta Kuijper , Michelle Chong , Iven Mareels , Chris Leckie

Serverless computing systems are becoming very popular. Large corporations such as Netflix, Airbnb, and Coca-Cola use such systems for running their websites and IT systems. The advantages of such systems include superior support for…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-03-14 Abhisek Panda , Smruti R. Sarangi

The complexity of embedded application design is increasing with growing user demands. In particular, automotive embedded systems are highly complex in nature, and their functionality is realized by a set of periodic tasks. These tasks may…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-11-28 Anna Minaeva , Benny Akesson , Zdenek Hanzalek , Dakshina Dasari

Modern commercial-off-the-shelf (COTS) multicore processors have advanced memory hierarchies that enhance memory-level parallelism (MLP), which is crucial for high performance. To support high MLP, shared last-level caches (LLCs) are…

Hardware Architecture · Computer Science 2025-07-23 Connor Sullivan , Alex Manley , Mohammad Alian , Heechul Yun

Isolation is a critical property for shared infrastructure to limit exposure and interference among simultaneous running workloads. Cloud providers use different isolation mechanisms such as full Virtual Machines, microVMs, Linux…

Operating Systems · Computer Science 2025-07-30 Anjali , Michael M. Swift

Background: The computationally intensive task of real-time rendering can be offloaded to remote cloud systems. However, due to network latency, interactive remote rendering (IRR) introduces the challenge of interaction latency (IL), which…

Networking and Internet Architecture · Computer Science 2019-05-21 Richard Cloete , Nick Holliman

In some important application areas of hard real-time systems, preemptive sporadic tasks with harmonic periods and constraint deadlines running upon a uni-processor platform play an important role. We propose a new algorithm for determining…

Operating Systems · Computer Science 2019-12-04 Thi Huyen Chau Nguyen , Werner Grass , Klaus Jansen