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Static Random-Access Memory (SRAM) yield analysis is essential for semiconductor innovation, yet research progress faces a critical challenge: the large gap between simplified academic models and the complexities observed in practice. The…

Hardware Architecture · Computer Science 2025-11-18 Shan Shen , Xingyang Li , Zhuohua Liu , Junhao Ma , Yikai Wang , Yiheng Wu , Yuquan Sun , Wei W. Xing

Processing large numbers of key/value lookups is an integral part of modern server databases and other "Big Data" applications. Prior work has shown that hash table based key/value lookups can benefit significantly from using a dedicated…

Hardware Architecture · Computer Science 2021-05-17 Joshua Landgraf , Scott Lloyd , Maya Gokhale

NAND flash memory is ubiquitous in everyday life today because its capacity has continuously increased and cost has continuously decreased over decades. This positive growth is a result of two key trends: (1) effective process technology…

Hardware Architecture · Computer Science 2018-01-08 Yu Cai , Saugata Ghose , Erich F. Haratsch , Yixin Luo , Onur Mutlu

This paper proposes TRAININGCXL that can efficiently process large-scale recommendation datasets in the pool of disaggregated memory while making training fault tolerant with low overhead. To this end, i) we integrate persistent memory…

Hardware Architecture · Computer Science 2023-01-23 Miryeong Kwon , Junhyeok Jang , Hanjin Choi , Sangwon Lee , Myoungsoo Jung

Software-based approaches for search over encrypted data are still either challenged by lack of proper, low-leakage encryption or slow performance. Existing hardware-based approaches do not scale well due to hardware limitations and…

Cryptography and Security · Computer Science 2017-03-16 Benny Fuhry , Raad Bahmani , Ferdinand Brasser , Florian Hahn , Florian Kerschbaum , Ahmad-Reza Sadeghi

As transistor counts in a single chip exceed tens of billions, the complexity of RTL-level simulation and verification has grown exponentially, often extending simulation campaigns to several months. In industry practice, RTL simulation is…

Hardware Architecture · Computer Science 2025-09-04 Weigang Feng , Yijia Zhang , Zekun Wang , Zhengyang Wang , Yi Wang , Peijun Ma , Ningyi Xu

As the amount of data produced in society continues to grow at an exponential rate, modern applications are incurring significant performance and energy penalties due to high data movement between the CPU and memory/storage. While…

Hardware Architecture · Computer Science 2024-03-12 Ryan Wong , Nikita Kim , Kevin Higgs , Sapan Agarwal , Engin Ipek , Saugata Ghose , Ben Feinberg

Since the advent of parallel algorithms in the C++17 Standard Template Library (STL), the STL has become a viable framework for creating performance-portable applications. Given multiple existing implementations of the parallel algorithms,…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-02-12 Ruben Laso , Diego Krupitza , Sascha Hunold

Storage-class memory (SCM) combines the benefits of a solid-state memory, such as high-performance and robustness, with the archival capabilities and low cost of conventional hard-disk magnetic storage. Among candidate solid-state…

Hardware Architecture · Computer Science 2017-04-19 Wonil Choi , Mohammad Arjomand , Myoungsoo Jung , Mahmut Kandemir

The expansion of context windows in large language models (LLMs) to multi-million tokens introduces severe memory and compute bottlenecks, particularly in managing the growing Key-Value (KV) cache. While Compute Express Link (CXL) enables…

As the memory channel count is confined by physical dimensions, memory expanders appear to be a promising approach to extending memory capacity and channels by augmenting the existing I/O interface (e.g., PCIe) with memory-semantic…

Hardware Architecture · Computer Science 2026-03-30 Younghoon Ko , Hyemin Park , Hyuk-Jae Lee , Hyokeun Lee

PCIe-connected FPGAs are gaining popularity as an accelerator technology in data centers. However, it is challenging to jointly develop and debug host software and FPGA hardware. Changes to the hardware design require a time-consuming FPGA…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-01-28 Shenghsun Cho , Mrunal Patel , Basavaraj Kaladagi , Han Chen , Tapti Palit , Michael Ferdman , Peter Milder

Scalable and efficient numerical simulations continue to gain importance, as computation is firmly established as the third pillar of discovery, alongside theory and experiment. Meanwhile, the performance of computing hardware grows through…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-06-26 Pietro Incardona , Antonio Leo , Yaroslav Zaluzhnyi , Rajesh Ramaswamy , Ivo F. Sbalzarini

In the continuously evolving cloud computing and network environment, service function chain (SFC) plays a crucial role in implementing complex services in the network with its flexible deployment capabilities. To address the limitations of…

Software Engineering · Computer Science 2025-12-15 Xi Wang , Shuo Shi , Chenyu Wu

The Compute Express Link (CXL) interconnect makes it feasible to integrate diverse types of memory into servers via its byte-addressable SerDes links. Considering the various access latency, harnessing the full potential of CXL-based…

Hardware Architecture · Computer Science 2024-09-12 Zhe Zhou , Yiqi Chen , Tao Zhang , Yang Wang , Ran Shu , Shuotao Xu , Peng Cheng , Lei Qu , Yongqiang Xiong , Jie Zhang , Guangyu Sun

Large language models (LLMs) training or inference across multiple nodes introduces significant pressure on GPU memory and interconnect bandwidth. The Compute Express Link (CXL) shared memory pool offers a scalable solution by enabling…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-08 Dong Xu , Han Meng , Xinyu Chen , Dengcheng Zhu , Wei Tang , Fei Liu , Liguang Xie , Wu Xiang , Rui Shi , Yue Li , Henry Hu , Hui Zhang , Jianping Jiang , Dong Li

Hyperdimensional Computing (HDC) is a brain-inspired computing paradigm that represents and manipulates information using high-dimensional vectors, called hypervectors (HV). Traditional HDC methods, while robust to noise and inherently…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-06-12 Dhruv Parikh , Viktor Prasanna

Engram conditional memory has emerged as a promising component for LLMs by decoupling static knowledge lookup from dynamic computation. Since Engram exhibits sparse access patterns and supports prefetching, its massive embedding tables are…

Hardware Architecture · Computer Science 2026-03-12 Ruiyang Ma , Teng Ma , Zhiyuan Su , Hantian Zha , Xinpeng Zhao , Xuchun Shang , Xingrui Yi , Zheng Liu , Zhu Cao , An Wu , Zhichong Dou , Ziqian Liu , Daikang Kuang , Guojie Luo

Solid-state drives (SSDs) have revolutionized data storage with their high performance, energy efficiency, and reliability. However, as storage demands grow, SSDs face critical challenges in scalability, endurance, latency, and security.…

Hardware Architecture · Computer Science 2026-02-12 Tianyu Ren , Yajuan Du , Jinhua Cui , Yina Lv , Qiao Li , Chun Jason Xue

This paper presents a set of models dedicated to describe a flash storage subsystem structure, functions, performance and power consumption behaviors. These models cover a large range of today's NAND flash memory applications. They are…

Performance · Computer Science 2013-07-05 Pierre Olivier , Jalil Boukhobza , Eric Senn