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Processing-in-Memory (PIM) architectures offer promising solutions for efficiently handling AI applications in energy-constrained edge environments. While traditional PIM designs enhance performance and energy efficiency by reducing data…

Hardware Architecture · Computer Science 2025-12-09 Sangmin Jeon , Kangju Lee , Kyeongwon Lee , Woojoo Lee

Vision Transformers (ViTs) have established new performance benchmarks in vision tasks such as image recognition and object detection. However, these advancements come with significant demands for memory and computational resources,…

Hardware Architecture · Computer Science 2026-02-10 Cong Wang , Zexin Fu , Jiayi Huang , Shanshi Huang

Processing-in-memory (PIM) has emerged as an enabler for the energy-efficient and high-performance acceleration of deep learning (DL) workloads. Resistive random-access memory (ReRAM) is one of the most promising technologies to implement…

Hardware Architecture · Computer Science 2024-03-29 Harsh Sharma , Gaurav Narang , Janardhan Rao Doppa , Umit Ogras , Partha Pratim Pande

The dynamic adaptation of resource levels enables the system to enhance energy efficiency while maintaining the necessary computational resources, particularly in scenarios where workloads fluctuate significantly over time. The proposed…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-14 Said Muhammad , Lahlou Laaziz , Nadjia Kara , Phat Tan Nguyen , Timothy Murphy

The increasing prevalence and growing size of data in modern applications have led to high costs for computation in traditional processor-centric computing systems. Moving large volumes of data between memory devices (e.g., DRAM) and…

Hardware Architecture · Computer Science 2022-06-01 Geraldo F. Oliveira , Juan Gómez-Luna , Saugata Ghose , Onur Mutlu

Training machine learning (ML) algorithms is a computationally intensive process, which is frequently memory-bound due to repeatedly accessing large training datasets. As a result, processor-centric systems (e.g., CPU, GPU) suffer from…

Hardware Architecture · Computer Science 2023-09-07 Juan Gómez-Luna , Yuxin Guo , Sylvan Brocard , Julien Legriel , Remy Cimadomo , Geraldo F. Oliveira , Gagandeep Singh , Onur Mutlu

Today's computing systems require moving data back-and-forth between computing resources (e.g., CPUs, GPUs, accelerators) and off-chip main memory so that computation can take place on the data. Unfortunately, this data movement is a major…

Hardware Architecture · Computer Science 2022-05-31 Geraldo F. Oliveira , Amirali Boroumand , Saugata Ghose , Juan Gómez-Luna , Onur Mutlu

Temperature affects not only the reliability but also the performance, power, and cost of the embedded system. This paper proposes a thermal-aware task allocation and scheduling algorithm for embedded systems. The algorithm is used as a…

Hardware Architecture · Computer Science 2011-11-09 W. -L. Hung , Y. Xie , N. Vijaykrishnan , M. Kandemir , M. J. Irwin

Nowadays, data-intensive applications are gaining popularity and, together with this trend, processing-in-memory (PIM)-based systems are being given more attention and have become more relevant. This paper describes an analytical modeling…

Hardware Architecture · Computer Science 2021-07-23 Ronny Ronen , Adi Eliahu , Orian Leitersdorf , Natan Peled , Kunal Korgaonkar , Anupam Chattopadhyay , Ben Perach , Shahar Kvatinsky

The rising demand for generative large language models (LLMs) poses challenges for thermal and power management in cloud datacenters. Traditional techniques often are inadequate for LLM inference due to the fine-grained, millisecond-scale…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-01-07 Jovan Stojkovic , Chaojie Zhang , Íñigo Goiri , Esha Choukse , Haoran Qiu , Rodrigo Fonseca , Josep Torrellas , Ricardo Bianchini

Many modern workloads such as neural network inference and graph processing are fundamentally memory-bound. For such workloads, data movement between memory and CPU cores imposes a significant overhead in terms of both latency and energy. A…

Hardware Architecture · Computer Science 2023-04-04 Juan Gómez-Luna , Izzat El Hajj , Ivan Fernandez , Christina Giannoula , Geraldo F. Oliveira , Onur Mutlu

Computing-in-Memory (CiM) is a promising paradigm to address the memory bottleneck constraining traditional systems. Most power-efficient CiM variants can directly perform Boolean operations in non-volatile memory arrays. Higher…

Emerging Technologies · Computer Science 2026-04-09 Patrick Miller , Hüsrev Cilasun , Sachin S. Sapatnekar , Ulya R. Karpuzcu

AI data centers are increasingly becoming tightly coupled compute--energy systems, where workload placement, cooling demand, electricity procurement, storage operation, and carbon emissions interact over time. This paper studies…

Computational Engineering, Finance, and Science · Computer Science 2026-05-14 Johnny R. Zhang , Gaoyuan Du , Qianyi Sun , Shiqi Wang , Jiaxuan Li , Xian Sun

Training machine learning algorithms is a computationally intensive process, which is frequently memory-bound due to repeatedly accessing large training datasets. As a result, processor-centric systems (e.g., CPU, GPU) suffer from costly…

Hardware Architecture · Computer Science 2022-08-04 Juan Gómez-Luna , Yuxin Guo , Sylvan Brocard , Julien Legriel , Remy Cimadomo , Geraldo F. Oliveira , Gagandeep Singh , Onur Mutlu

The proliferation of large language models (LLMs) is accelerating the integration of multimodal assistants into edge devices, where inference is executed under stringent latency and energy constraints, often exacerbated by intermittent…

Hardware Architecture · Computer Science 2026-01-29 Yanru Chen , Runyang Tian , Yue Pan , Zheyu Li , Weihong Xu , Tajana Rosing

Large Language Models (LLMs) have become essential in a variety of applications due to their advanced language understanding and generation capabilities. However, their computational and memory requirements pose significant challenges to…

Hardware Architecture · Computer Science 2024-12-02 Cristobal Ortega , Yann Falevoz , Renaud Ayrignac

Conventional LLM inference architectures suffer from high energy and latency due to frequent data movement across memory hierarchies. We propose Ouroboros, a wafer-scale SRAM-based Computing-in-Memory (CIM) architecture that executes all…

Hardware Architecture · Computer Science 2026-03-04 Yiqi Liu , Yudong Pan , Mengdi Wang , Shixin Zhao , Haonan Zhu , Yinhe Han , Lei Zhang , Ying Wang

Memory tiering systems seek cost-effective memory scaling by adding multiple tiers of memory. For maximum performance, frequently accessed (hot) data must be placed close to the host in faster tiers and infrequently accessed (cold) data can…

Operating Systems · Computer Science 2025-08-07 Sujay Yadalam , Konstantinos Kanellis , Michael Swift , Shivaram Venkataraman

SRAM Processing-in-Memory (PIM) has emerged as the most promising implementation for high-performance PIM, delivering superior computing density, energy efficiency, and computational precision. However, the pursuit of higher performance…

Hardware Architecture · Computer Science 2025-11-07 Yuanpeng Zhang , Xing Hu , Xi Chen , Zhihang Yuan , Cong Li , Jingchen Zhu , Zhao Wang , Chenguang Zhang , Xin Si , Wei Gao , Qiang Wu , Runsheng Wang , Guangyu Sun

Processing-in-memory (PIM) has emerged as a promising solution for accelerating memory-intensive workloads as they provide high memory bandwidth to the processing units. This approach has drawn attention not only from the academic community…

Hardware Architecture · Computer Science 2024-09-11 Dongjae Lee , Bongjoon Hyun , Taehun Kim , Minsoo Rhu
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