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We consider controller design for robust output tracking and disturbance rejection for continuous-time periodic linear systems with periodic reference and disturbance signals. As our main results we present four different controllers: A…
Radiation measurement relies on pulse detection, which can be performed using various configurations of high-speed analog-to-digital converters (ADCs) and field-programmable gate arrays (FPGAs). For optimal power consumption, design…
High hardware cost and high power consumption of massive multiple-input and multiple output (MIMO) are two challenges for the future wireless communications including beyond fifth generation (B5G) and sixth generation (6G). Adopting the…
Laser power instability, encompassing random jitter and slow drift, severely limits the performance of optically pumped magnetometers (OPMs) in detecting ultra-weak magnetic fields, especially in large-scale OPM arrays for…
The ubiquitous use of sensing and signal processing is increasing exponentially with the advance of the Internet of Everything (IoE). In this context, the design of every time more power efficient sensor nodes is a must. Within these nodes,…
This paper presents the analytical design of a new wide tuning range and low-noise millimeter-wave voltage control oscillators (VCO) for 5G technology. The small signal model analysis and phase noise of the VCOs will be presented to…
This paper presents an active disturbance rejection control (ADRC) scheme with an improved fractional-order extended state observer (IFO-ESO).Based on the new ADRC scheme, the open-loop transfer function of a high-order system can be…
This paper proposes a nonlinear, adaptive controller to increase the stability margin of a direct-current (DC) small-scale electrical network containing a constant power load, whose value is unknown. Due to their negative incremental…
In this work, we derive a lower bound on the training-based achievable downlink (DL) sum rate (SR) of a multi-user multiple-input-single-output (MISO) system operating in frequency-division-duplex (FDD) mode. Assuming linear minimum mean…
Phase Frequency Detectors (PFDs) are essential components in Phase-Locked Loop (PLL) and Delay-Locked Loop (DLL) systems, responsible for comparing phase and frequency differences and generating up/down signals to regulate charge pumps…
This letter presents a novel adaptive power division strategy, which uses two rectifying diodes with nonlinear impedance characteristics that are configured in parallel to function optimally at their individual power levels. Through the…
Significant transient beam loading effects were observed during beam commissioning tests of prototype II of the injector for the Accelerator Driven Sub-critical (ADS) system, which took place at the Institute of Modern Physics, Chinese…
This paper presents the designs of asynchronous early output dual-bit full adders without and with redundant logic (implicit) corresponding to homogeneous and heterogeneous delay-insensitive data encoding. For homogeneous delay-insensitive…
We have demonstrated broadband frequency-noise suppression in a laser stabilization system by augmenting a conventional proportional-integral-derivative (PID) controller with a digital disturbance observer (DOB) implemented on a…
Full Duplex or Simultaneous transmission and reception (STR) in the same frequency at the same time can potentially double the physical layer capacity. However, high power transmit signal will appear at receive chain as echoes with powers…
Interconnected power grid exhibits oscillatory response after a disturbance in the system. One such type of oscillations, the inter-area oscillations has the oscillation frequency in the range of 0.1 to 1 Hz. The damping of inter-area…
New nanotechnology based devices are replacing CMOS devices to overcome CMOS technology's scaling limitations. However, many such devices exhibit non-monotonic I-V characteristics and uncertain properties which lead to the negative…
In this paper, we investigate a novel reconfigurable distributed antennas and reflecting surface (RDARS) aided multi-user massive MIMO system with imperfect CSI and propose a practical two-timescale (TTS) transceiver design to reduce the…
Distributed vertical power delivery (DVPD) architectures employ multiple parallel voltage regulators (VRs) to meet the high-power and high current density demands of modern high performance computing (HPC) systems. While full parallel…
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and methods used to specify block constraints, to design and verify the…